Vance Wang

EDUCATION:

1. S.M.U. Dallas,Tx,USA
2. N.T.U.T Tapei,TW

WORKING EXPERIENCE:

GTA Semi V.P.[New Fab start up] – 2018/8~up to now
-1st pillar to tool move in –499 days
– Mini line tools installation/Pi-run succeed with yield greater than 95%

SMIC senior Director – 2001/3~2018/7
– 2004/6~2018/7
SMIC BJ Fab4C Fab director, SMNC Tech support senior director in charge of PC,IE,IT,Product,Quality departments

– 2001/3~2004/5
SMIC Fab1 PIE department manager

TSMC Y.E.Section manager 2000/1~2001/3
– 300mm start up team /YE section manager

V.I.S.C [Vanguard] 1994/5~1999/12
– Fab YE senior Engineer

KLA Taiwan 1991/12~1994/5
– Service Manager PATENT USA 6143596 :Planarization for interlayer directric USA 6037220 Method of increasing the surface area of a DRAM capacitor structure via the use of hemispherical