• 13:20 – 13:40

Chiplet Process Integration Based on Glass Substrate and TGV Process

The hole size can be less than 15 microns, and the metal filling capacity aspect ratio can reach 10:1. It adopts high-density intermediate layer wiring, with a minimum line width and line spacing of less than 1.5um, meeting the needs of high-density interconnections such as high-performance memory and CPU. The entire packaging body uses glass as the core layer of the intermediate layer, and uses the “RDL-First” process to flip the chip onto multiple layers of RDL wiring layers to achieve electrical interconnection. Compared with TSV, it reduces parasitic capacitance and inductance effects, reduces transmission signal delay, and can be widely used in high-frequency transmission fields.

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Dr. Wenbiao Ruan photo

Dr. Wenbiao Ruan

R&D Director

Xiamen Sky Semiconductor Technology Co., Ltd.

Ph.D, majoring in Electronics and Solid State Electronics at the Chinese Academy of Sciences, currently serving as the Director of R&D at Xiamen Yuntian Semiconductor Technology Co., Ltd., responsible for the research and development of processes such as through glass via (TGV), fanout packaging (WL-FO), wafer level packaging technology, and glass based high-frequency devices. He has successively served in SMIC., Institute of Microelectronics and Detection Technology. In 2010, he was appointed as an associate researcher at the Institute of Microelectronics, conducting research on the modeling of integrated circuit manufacturing processes and manufacturability design methodology for 65 nm and below node, and participating in and completing multiple national major special research projects. Published over 10 articles and applied for 18 patents.

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Founded in July 2018, Xiamen Sky-semi commits to the development and industrialization of advanced packaging and system integration technology for high-speed and high-frequency communication applications. Through independent R&D and collaborative innovation, we provide customers with integrated solutions and services from collaborative product design, process research and development to mass production.

The main business of Xiamen Sky-semi includes Wafer Level 3D Package (WLP), Fan Out Package (FO), System in Package (SIP) and Module, IPD device manufacturing, High Density Glass Through Via (TGV) technology, manufacturing of high precision antenna ,etc. We have provided design, packaging and integration services for nearly 100 customers at home and abroad。Sky-semi has a core team with outstanding innovation ability that has broken through a series of core and key technologies and has full range of wafer level system packaging as well as precision manufacturing capabilities from 4 inch, 6 inch, 8 inch to 12 inch.

Sky-semi Semiconductor based on technological innovation embarking on seize the historical opportunity to achieve leapfrog development in the new era of global semiconductor industry competition pattern by adhere to customer-centered ,Innovative and progressing philosophy,5G application as a breakthrough.

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