A wide range of applications in consumer electronics, automotive electronics, IoT applications and 5G cellular communications are increasingly dependent on devices such as sensors, including MEMS, and CMOS image sensors, RF Devices, advanced power semiconductors and Bipolar-CMOS-DMOS ICs. This trend means these specialty technologies currently account for approximately 30% of all global IC demand¹.

Deep reactive ion etching (DRIE), initially developed for the fabrication of MEMS devices², has since become one of the key enabling technologies used in the fabrication of such devices as well as in advanced packaging schemes that require through silicon via (TSV) integration. At the same time, demands on the capability of the DRIE process have increased as device architectures have advanced and production has shifted to high volume manufacturing on 300mm substrates.

Lam Research’s Rapidly Alternating Process (RAP) and Syndion® DRIE tools have been well established in such high-volume manufacturing for more than two decades. Today we are focused on continued enhancement of our systems and process control methodologies in order to meet future requirements.

In this work we show how development of our deep silicon etch hardware and process capabilities is resulting in significant improvements in on-wafer results and supporting next generation device fabrication. Such challenges include the continuous improvement of process productivity, improved profile control, achieving smoother etched sidewalls, and improving uniformity of both etch depth and feature CD.

To illustrate this, we will discuss critical applications such as advanced deep trench isolation (DTI) in CMOS image sensors, etching of power device trenches and TSV fabrication.

1. IC Insights, McClean Report, Feb 2022
2. Franz Laermer and Andrea Schilp, Robert Bosch GmbH, Method of anisotropically etching silicon, United States Patent 5501893