17:40 – 17:50

Ensuring Power Semiconductor Reliability: Testing SiC Semiconductor Devices at KGD Level 确保功率半导体的可靠性:在KGD(良品芯片)级别测试SiC半导体器件

This presentation explores the critical role of comprehensive production testing at the Known Good Die (KGD) level for power semiconductor devices based on SiC technology. The manufacturing complexity and fabrication costs make die-level testing a crucial quality control step for these components. On one side, complexity brings a high potential for defects; on the other side, the need to minimize yield losses is crucial to ensure device affordability.
Focusing on dynamic testing and especially on short circuit testing, we will present the specific challenges of performing these tests on KGD SiC devices, delving into the characteristics that test equipment must possess to face these challenges.
The presentation will demonstrate how a comprehensive KGD test strategy enables manufacturers of SiC devices to minimize downstream production costs while achieving superior product quality and reliability.
这次演讲探讨了在基于SiC技术的功率半导体器件中,全面生产测试在已知良品(KGD)级别的关键作用。制造复杂性和加工成本使得晶圆级测试成为这些组件至关重要的质量控制步骤。一方面,复杂性带来了高潜在缺陷的风险;另一方面,为了确保器件的经济性,最小化良品率损失是至关重要的。
我们将重点关注动态测试,特别是短路测试,展示在KGD SiC器件上进行这些测试的具体挑战,并深入探讨测试设备必须具备的特性以应对这些挑战。
此次演讲将展示如何通过全面的KGD测试策略,使SiC器件制造商能够降低下游生产成本,同时实现卓越的产品质量和可靠性。
Yuanli Sun photo

Yuanli Sun

General Manager, SPEA China

SPEA