- 11:00 – 11:10
Processing Innovations to Address the Manufacturing Challenges of Heterogeneous Integration
Heterogeneous design and integration has been referred to as the fourth stage in the evolution of Moore’s Law, as it enables us to integrate sets of chiplets into high performance computing packages with simultaneous improvements in power, performance, and area-cost. The need for high bandwidth and power-efficient interconnects between chiplets is driving new process technologies and automation technologies that address the higher feature densities and higher sensitivity to defects.
Large form factor panel-level processing enables higher manufacturing productivity at low cost but introduces several manufacturing challenges. The higher density of interconnections requires fine line capability that presents a challenge to traditional process equipment. Warping of the large and flexible substrates presents challenges both for handling the panels as well as the formation of reliable interconnects. The complexity of assembling multi-chiplet packages requires new factory automation solutions that can maximize product quality and factory utilization.
High resolution patterning can be achieved with materials and technologies from traditional front end processing, including PVD, Dry Etch, CVD and ALD. With its broad portfolio of semiconductor and display fabrication technologies and products, Applied Materials is addressing the challenge of delivering Front End manufacturing capability at Back End cost requirements. This presentation will highlight Applied innovations that enable panel level packaging and the factory of the future.
Len Tedeschi is vice president and general manager, Core Packaging Products at Applied Materials. Len is directly responsible for the Metals Packaging Products (MPP), Packaging Plating & Cleans (PPC), Tango & Plasma Dicing product groups. His focus is ensuring customers are successful with their current products, while simultaneously solving customer’s future high value problems.
Len has worked at Applied for >20 years and has over 27 years of semiconductor experience in roles ranging from product development & support, productivity, technical strategy, marketing, and general management. Len has worked with a variety of products and technologies including etch, deposition, lithography, metrology, and inspection.
Prior to joining Packaging, Len spent 14 years in Applied’s Etch Business Unit in a wide variety of customer focused positions. Len has >10 patents granted, mainly as the lead author.
Len began his career in 1995 as a lithography equipment engineer at IDT in Santa Clara, California.
He earned a bachelor of science degree in industrial technology from San Jose State University in 1995, where he served as captain of the university’s judo team, winning two collegiate national titles, and competing in the 1996 Olympic Judo Trials.
We are the leader in materials engineering solutions used to produce virtually every new chip and advanced display in the world. Our expertise in modifying materials at atomic levels and on an industrial scale enables customers to transform possibilities into reality. At Applied Materials, our innovations Make Possible® a Better Future.View Full Profile