08:30 – 08:50

Epitaxy: The lithography of GaN

The world’s need for more efficient power solutions together with Net Zero initiatives are driving development for GaN on silicon as a solution for voltage nodes up to 650 V. Building on market insertion for lower voltage applications (e.g., efficient USB-C chargers), fabless and specialty foundries are rapidly developing the technology for higher voltage commercial and automotive applications.

The successful development of viable GaN on silicon technology for these applications requires a paradigm shift for technology innovation. For over 50 years, most semiconductor innovation has focused on CMOS silicon where device design and fabrication have been the key enablers. In these instances, the starting materials, silicon wafers, have been a commodity and not an area of innovation and development. For GaN on silicon, this is no longer the case; the key enabler and differentiator is at the materials/epiwafer level. Advancing GaN on silicon requires fundamental materials engineering to address inherent strain and thermal challenges. Specifically, the enabling innovation is in the epitaxial engineering of the growth process, thus overcoming technological challenges at the materials level.

To demonstrate the shift in the innovation landscape, data for 650 e/d mode GaN on silicon HEMTs will be presented along with a roadmap to higher voltage nodes.

Dr. Rodney Pelzel photo

Dr. Rodney Pelzel

CTO

IQE