• 11:40 – 12:00

The Opportunity & Challenge of OSAT for the Coming Chiplet Integration Package

The development of semiconductor IC follows Moore’s law. Today, it has encountered great challenges, whether it’s the physical size limit or the advanced manufacturing process with huge investment costs ,and so on have formed huge pressure on the industry. Packaging is considered to be the focus of continuing semiconductor chip integration in the next decade development direction, especially in the 2.5D, 3D packaging technology brought by the chiplet concept; We see that wafer factories have made faster progress in 2.5D and 3D packaging, What are their opportunities for OSAT? What challenges will it face?

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Yupeng Xu photo

Yupeng Xu


Forehope Electronic (Ningbo) Co., Ltd.

Xu YuPeng, CTO of FOREHOPE electronic(NINGBO) Co.LTD since June of 2018. 21 years experience in semiconductor assembly house. Before FHEC, Mr Xu has 7 years experience work as VP of ICBU in JCET (2011~2018). and 7 years RND engineer/Manager in Statschippac shanghai(2004~2011). 2 years process engineer in ASE shanghai(2002~2003). Mr Xu experienced with all kinds of IC package assembly process & technology ,especially in SiP integration, Automotive IC , wafer level package development etc.

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Forehope(FHEC) was founded in Nov 2017, devoted to a worldwide and industry-leading high-end IC ,package assembly and testing . The end customer application covered consumer electronics,AI, industry, Automotive, Network,Data center etc. We can deliver package type include WBQFN, WBLGA, WBBGA, FCCSP, Hybrid-BGA, SiP, MEMS.,QFP, FCBGA etc. And also we can provide wafer level package include Bumping, WLCSP. Forehope continue to research & develop advanced wafer level package like as Fan-out, 2.5D/3D , which for chiplet solutions.

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