14:50 – 15:10

Keynote

Wafer Test Challenges in the HPC AI Era

The generative AI is driving significant growth in the semiconductor industry. To deliver the massive computing power required to train AI models, new chip designs pack increasingly more transistors and adopt disaggregated chiplet architectures, connected by advanced packaging technologies. This presentation will describe the some of the test challenges and opportunities for HPC AI products.

Kam Lee

Senior Director, Advanced Packaging Technology and Service

TSMC