• 07:00 – 08:00

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  • 07:00 – 08:15

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  • 07:50 – 08:30

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DRIVING MANUFACTURING LEADERSHIP

  • 07:55 – 08:25

Registration

  • 08:00 – 08:25

Welcome Speech

Salah Nasri photo

Salah Nasri

President

ISES

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International Semiconductor Executive Summits (ISES) holds a significant position within the semiconductor industry. Since 2010 we have scaled 8 major successful regional events globally. Our initiatives to date have been fully supported by local governments. For e.g., ISES USA is hosted in partnership with the Greater Phoenix Economic Council, ISES Taiwan is hosted in partnership with ITRI, ISES EU is hosted in partnership with the EU Commission, ISES Southeast Asia in partnership with Invest in Penang. We serve as a platform where senior executives in technology, manufacturing and R&D from various semiconductor companies, technology providers, and related industries gather to exchange information, shape strategies, and discuss the industry’s direction. Our summits have influenced industry trends and decisions due to the high-level discussions that take place.

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  • 08:00 – 08:35

Registration

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  • 08:15 – 08:45

Registration

  • 08:15 – 08:30

Welcome Speech

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Kamel Ait Mahiout

President

ISES

Kamel Ait Mahiout is a seasoned professional with over 30 years of experience in the electronics industry. His expertise spans from RF and Microwave engineering to executive roles in prominent companies such as Unity SC and Amkor Technology, where he significantly contributed to the growth and alignment of the businesses with key industry players.

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International Semiconductor Executive Summits (ISES) holds a significant position within the semiconductor industry. Since 2010 we have scaled 8 major successful regional events globally. Our initiatives to date have been fully supported by local governments. For e.g., ISES USA is hosted in partnership with the Greater Phoenix Economic Council, ISES Taiwan is hosted in partnership with ITRI, ISES EU is hosted in partnership with the EU Commission, ISES Southeast Asia in partnership with Invest in Penang. We serve as a platform where senior executives in technology, manufacturing and R&D from various semiconductor companies, technology providers, and related industries gather to exchange information, shape strategies, and discuss the industry’s direction. Our summits have influenced industry trends and decisions due to the high-level discussions that take place.

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  • 08:30 – 08:50

The Essential Evolution of Packaging in the Systems Foundry Era

The transition to the AI era and the next era of computing requires a fundamental shift in the semiconductor industry to heterogenous systems of chips. A systems foundry approach combines world-class foundry offerings, sustainable and resilient supply, and co-optimized, composable packaging solutions to enable systems of chips with enhanced capabilities and efficiencies for the AI era.

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Stuart Pann

SVP & GM

Intel IFS

Stuart Pann is senior vice president and general manager of Intel Foundry Services (IFS). In this role, Pann drives continued growth for IFS and its differentiated systems foundry offering, which goes beyond traditional wafer fabrication to include packaging, chiplet standards and software, as well as U.S.- and Europe-based capacity.

Pann previously served as chief business transformation officer and general manager of Intel’s Corporate Planning Group. As part of this role, he established the company’s IDM 2.0 Acceleration Office (IAO) to guide the implementation of an internal foundry model. IAO closely collaborates with all Intel business units and functional teams to support the company’s internal foundry model.

In June 2021, Pann returned to Intel, where he had started his career in 1981. Prior to his return, he was chief supply chain officer and chief information officer at HP for six years. At HP, Pann was responsible for the company’s supply chain, which delivers nearly 100 million products to customers each year.

Before joining HP in July 2014, Pann served as corporate vice president and general manager of Intel’s Business Management Group, where he was responsible for pricing, revenue and forecasting functions for the company’s microprocessor and chipset operations. He also co-managed the geographic operations teams for the Intel sales force and was responsible for order management and external-facing supply chain programs. Pann held several management positions within the company’s sales organization before moving into an operations role in 1999 as the director of Microprocessor Marketing and Business Planning.

Pann earned a bachelor’s degree in electrical engineering from Michigan Technological University and an MBA from the University of Michigan.

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  • 08:30 – 08:55

Japan’s Policy Trends in Semiconductor and Digital Industry Strategy

Two years have passed since the formulation of the Semiconductor and Digital Industry Strategy in June 2021, the Ministry of Economy, Trade and Industry revised its Semiconductor and Digital Industry Strategy in June 2023.

In this strategy, in the semiconductor sector, Japan aims to achieve total sales of 15 trillion yen or more for domestic semiconductor manufacturing companies by 2030, and while step 1 is developing semiconductor manufacturing capability, step 2 will bethe establishment of manufacturing technology for 2nm and beyond logic semiconductors. Finally, it will work on the development of future, game-changing technologies, such as photonics-electronics convergence in step 3.

In this presentation, specific initiatives such as research and development, human resource development, and international collaboration based on the Semiconductor and Digital Industry Strategy will be explained, along with the latest policy trends.

Watch on ISES TV > PPTs in ISES Docs >
Hisashi Kanazashi photo

Hisashi Kanazashi

Director, IT Div

Ministry of Economy, Trade and Industry (METI)

Director, IT Industry Division, Commerce and Information Policy Bureau, METI(Ministry of Economy, Trade and Industry)

1998 Joined the Ministry of International Trade and Industry (MITI)

2007 Visiting Scholar, Stanford University

2008 MBA from EDHEC Business School, France

2009 Industrial Revitalization Division

2011 Policy Planning and Coordination Division, Minister’s Secretariat

2014 Japan Economic Revitalization Bureau, Cabinet Secretariat

2016 Deputy Director, JETRO Los Angeles Office,

Director, Industry Creation Policy Division, Principal Director, IT Industry and Digital Economic Security, etc

2021 Counselor for Information Industry and Digital Economy and Security, Minister’s Secretariat

July 1, 2022 Current Position

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BUILDING ROBUST ADVANCED PACKAGING CAPABILITIES FOR HPC & AI IN THE U.S.

  • 08:35 – 08:55

ISES Welcome Address

Kamel Ait Mahiout photo

Kamel Ait Mahiout

President

ISES

Kamel Ait Mahiout is a seasoned professional with over 30 years of experience in the electronics industry. His expertise spans from RF and Microwave engineering to executive roles in prominent companies such as Unity SC and Amkor Technology, where he significantly contributed to the growth and alignment of the businesses with key industry players.

View Full Profile

International Semiconductor Executive Summits (ISES) holds a significant position within the semiconductor industry. Since 2010 we have scaled 8 major successful regional events globally. Our initiatives to date have been fully supported by local governments. For e.g., ISES USA is hosted in partnership with the Greater Phoenix Economic Council, ISES Taiwan is hosted in partnership with ITRI, ISES EU is hosted in partnership with the EU Commission, ISES Southeast Asia in partnership with Invest in Penang. We serve as a platform where senior executives in technology, manufacturing and R&D from various semiconductor companies, technology providers, and related industries gather to exchange information, shape strategies, and discuss the industry’s direction. Our summits have influenced industry trends and decisions due to the high-level discussions that take place.

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HPC and AI Session

  • 08:35 – 08:55

Greater Phoenix: Semiconductor Excellence on the Global Stage

Camacho presents the industry’s recent boom and how Greater Phoenix is harnessing its strengths to become a magnet for innovation and investment, furthering its position as a globally leading semiconductor market.

PPTs in ISES Docs >
Chris Camacho photo

Chris Camacho

President & CEO

Greater Phoenix Economic Council (GPEC)

Chris Camacho serves as president & CEO of the Greater Phoenix Economic Council (GPEC), one of the longest-standing public-private partnerships for economic development across the country. As chief executive, Chris leads the development and execution of the region’s strategic economic strategy, oversees domestic and international business development, and ensures the market position remains competitive through coordination with partner organizations, private sector leaders, and municipal and state leadership. GPEC has attracted more than 540 companies during his tenure, creating more than 100,000 jobs and $56.8 billion in capital investment. Some notable projects include TSMC, Apple, LG Energy Solutions, Microsoft, GoDaddy, Amazon, Garmin, General Motors, HelloFresh, KORE Power, Williams-Sonoma and headquarters including Benchmark Electronics, Carlisle Companies, Rogers Corporation and EMD Electronics. In October 2021, Chris led GPEC to being recognized as the top economicdevelopment organization globally by the International Economic Development Council a year after being named the top EDO in the U.S. in 2020.

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Established in 1989, the Greater Phoenix Economic Council (GPEC) actively works to attract and grow quality businesses and advocate for the competitiveness of Greater Phoenix. As the regional economic development organization, GPEC works with 22 member communities, Maricopa County and almost 200 private investors to accomplish its mission, and serve as a strategic partner to companies across the world as they expand or relocate. Consistently ranked as a top national economic development organization, GPEC’s approach to connectivity extends beyond the fabric of the community. Known as The Connected Place, Greater Phoenix is in a relentless pursuit of innovative and entrepreneurial technology-focused companies that are committed to changing the game. As a result, over the past 32 years GPEC has fueled the regional economy by helping more than 895 companies, creating more than 163,000 jobs and $33.4 billion in capital investment.

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  • 08:40 – 09:10

Keynote

TBC

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Jason Ma, Ph.D.

Engineering Director, Technical Site Lead Google Taiwan

Google

As the Engineering Director, Jason Ma oversees Google Taiwan’s site growth, business management and development, as well as leads multiple R&D projects across the board. Before taking this leadership role at Google Taiwan, Jason was a Platform Technology and Cloud Computing expert in the Platform & Ecosystem business group at Google Mountain View, CA. In his 12 years with Google, Jason has successfully led strategic partnerships with global hardware and software manufacturers and major chip providers to drive various innovations in cloud technology. These efforts have not only contributed to a substantial increase in Chromebook’s share in global education, consumer and enterprise markets, but have also attracted global talents to join Google and its partners in furthering the development of hardware and software technology solutions/services.

Prior to joining Google, Jason served on the Office group at Microsoft Redmond, WA. He represented the company in a project, involving Merck, Dell, Boeing, and the United States Department of Defense, to achieve solutions in unified communications and integrated voice technology. In 2007, Jason was appointed Director of the Microsoft Technology Center in Taiwan. During which time, Jason led the Microsoft Taiwan technology team and worked with Intel and HP to establish a Solution Center in Taiwan to promote Microsoft public cloud, data center, and private cloud technologies, connecting Taiwan’s cloud computing industry with the global market and supply chain.

Before joining Microsoft, Jason was Vice President and Chief Technology Officer at Soma.com. At Soma.com, Jason led the team in designing and launching e-commerce services, and partnered with Merck and WebMD on health consultation services and over the counter/prescription drugs/services. Soma.com was in turn acquired by CVS, the second largest pharmacy chain in the United States, forming CVS.com, where Jason served as Vice President and Chief Technology Officer and provided solutions for digital integration.

Jason graduated from the Department of Electrical Engineering at National Cheng Kung University, subsequent which he moved to the United States to further his graduate studies. In 1993, Jason obtained a Ph.D. in Electrical Engineering from the University of Washington, with a focus in the integration and innovation of power systems and AI Expert Systems. In 1997, Jason joined the National Sun Yat-sen University as an Associate Professor of Electrical Engineering. To date, Jason has published 22 research papers and co-authored 2 books. Due to his outstanding performance, Jason was nominated and listed in Who’s Who in the World in 1998.

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Our mission is to organize the world’s information and make it universally accessible and useful.

Website: www.google.com
Headquarters: 1600 Amphitheatre Pkwy, Mountain View, CA 94043
Phone: +1 (650) 253-0000

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Front End Technology

  • 08:45 – 09:10

Keynote

The Challenge of Speed – The Rapidus Model for a New Manufacturing Era

As the miniaturization of advanced logic processes continues, the time from design to commercialization is lengthening.
This is due to the increasing difficulty of the manufacturing process, design, and verification associated with the growing complexity of device structures. However, LSIs, such as processors and accelerators for AI, are evolving at a rapid pace and must be commercialized in a short period of time to meet time- to-market requirements. We will introduce the Rapidus model, which solves this problem and achieves short TAT manufacturing.

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Kazunari Ishimaru photo

Kazunari Ishimaru

Senior Managing Executive Officer, Silicon Technology Division, IEEE Fellow

Rapidus

Joined Toshiba, Semiconductor Device Engineering Labs. in 1988 and engaged in development of advanced SRAM/Logic technologies. 2006-2010: engaged in development of 32nm~20nm CMOS platform technologies with IBM as Toshiba’s representative (VP of R&D). 2013 Senior Manager of Advanced Memory Technology Development Dept. 2022 Director of Memory Technology R&D Center. Joined Rapidus Corporation in April 2023.

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  • 08:55 – 09:15

Advanced Packaging and Disaggregated Architectures for Automotive

The recent growth in ADAS and Autonomous Driving has brought a new focus to automotive compute while simultaneously, the introduction of Software Defined Vehicles has seen a consolidation of automotive compute into a centralized architecture – a stark departure of previous distributed zonal architectures. These recent developments have brought great interest and focus into the deployment of advanced packaging and the adoption of “chiplets” through heterogenous architectures.

This talk will address the areas of focus for adopting advanced packaging in automotive use cases as well as put forward a pragmatic approach for introducing chiplets and disaggregated architectures for autonomous driving and ADAS features. Lastly, the talk will cover some critical areas of development and roadblocks for adoption into L4+ systems – such as interposer qualification, material qualifications, and an open chiplet ecosystem.

Bassam Ziadeh photo

Bassam Ziadeh

Global Technical Specialist – IC Packaging, Assembly & Test

General Motors

Bassam is a Global Technical Specialist at General Motors, where he is responsible for defining a strategic roadmap for advanced automotive semiconductor packaging—essential for achieving GM’s role in Autonomous Driving and Software Defined Vehicle compute. Bassam’s expertise lies in Advanced Packaging, Chip and Product Architecture, OSAT and Industry Engagement, and successful product ramps. He is actively involved with IMEC and the UCIe for commercialization of these ventures. Previously, as a Senior Technologist of Advanced Packaging at Intel for 12 years, Bassam pioneered key technologies and process steps for 2.5D and 3D products for data center and client applications such as EMiB and Foveros. He holds degrees in Mechatronics and Mechanical Engineering and has contributed extensively to the field through numerous publications, patents, and conference proceedings on advanced packaging and automotive compute.

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General Motors is a global company focused on advancing an all-electric future that is inclusive and accessible to all. At the heart of this strategy is the Ultium battery platform, which powers everything from mass-market to high-performance vehicles. General Motors, its subsidiaries and its joint venture entities sell vehicles under the Chevrolet, Buick, GMC, Cadillac, Baojun and Wuling brands. More information on the company and its subsidiaries, including OnStar, a global leader in safety services and connected vehicle technology, can be found at https://www.gm.com.

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Chiplet Ecosystem Acceleration: Strategy, Roadmap & Standardization

  • 09:00 – 09:30

Keynote

Chiplet Ecosystem Acceleration

The speaker will share the work of TSMC in Chiplet Ecosystem acceleration by following outlines.

Outlines:

  • Forces Driving Chiplet and Integration
  • Advanced CMOS Technologies
  • Advanced Packaging Technologies
  • Design Enablement and Ecosystem
KC Hsu photo

K.C. Hsu

VP, Research & Development / Integrated Interconnect & Packaging

TSMC

Mr. K.C. Hsu is Vice President of Integrated Interconnect & Packaging at Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC), responsible for the development of TSMC’s system integration technologies, including 3D IC and advanced packaging. He possesses more than 30 years’ experience in the semiconductor industry.

Mr. K.C. Hsu received his B.S. in Physics from National Taiwan University and his M.S. in Technology Management from National Chiao Tung University.

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TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.

TSMC deployed 281 distinct process technologies and manufactured 11,617 products for 510 customers in 2020 by providing broadest range of advanced, specialty and advanced packaging technology services. TSMC is the first foundry to provide 3-nanometer production capabilities, the most advanced semiconductor process technology available in the world. The Company is headquartered in Hsinchu, Taiwan.

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  • 09:00 – 09:30

Keynote

Advanced Packaging: Navigating System Technology Co-optimization & Embracing Innovation

The global demand for computing is undergoing a notable shift, propelled by factors such as AI/ML, the imperative for ubiquitous connectivity, and a steadfast focus on energy efficiency. In line with the industry’s unwavering commitment to continuous innovation at Moore’s Law cadence, a system technology co-optimization (STCO) approach has been adopted. Consequently, the boundaries between silicon technology and advanced packaging are becoming increasingly blurred.

This keynote delves into the advanced packaging toolset encompassing scaling, materials, testing, and standardization, available to the advanced packaging ecosystem as it navigates the STCO era of Moore’s Law. The importance of sharing ecosystem expertise and ideas across silicon and advanced packaging is underscored for unlocking industry-disrupting benefits. Furthermore, the keynote showcases current innovations aimed at tackling system-level challenges such as bandwidth, energy efficiency, power density, and thermal management.

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Dr. Ann Kelleher

EVP & GM Technology Development

Intel

Dr. Ann Kelleher is the executive vice president and general manager of Technology Development at Intel Corporation. Since 2020, she is responsible for the research, development and deployment of the next-generation silicon, advanced packaging, and test technologies that power Intel’s innovation. She joined Intel in 1996 as a process engineer and has worked in areas spanning from litho, thin films, yield, to managing all of Intel’s Global operations including Fab and Assembly Test factories, supply chain and construction. She did her Ph.D. in electrical engineering from University College Cork in Ireland and her post-doc at IMEC.

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Intel (Nasdaq: INTC) is an industry leader, creating world-changing technology that enables global progress and enriches lives. Inspired by Moore’s Law, we continuously work to advance the design and manufacturing of semiconductors to help address our customers’ greatest challenges. By embedding intelligence in the cloud, network, edge and every kind of computing device, we unleash the potential of data to transform business and society for the better.

To learn more about Intel’s innovations, go to newsroom.intel.com and intel.com.

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  • 09:00 – 09:25

Keynote

Glass Core Substrate: Next Gen Advanced Packaging Technology

Advanced packaging is enabling unprecedented levels of product performance as logic and memory chiplets are connected in unique architectures merging back-end silicon fabrication with package assembly. To meet future scaling, high speed signaling and power delivery needs, the package substrate must evolve beyond the capabilities offered by organic substrates. Glass substrates contain the
mechanical, physical and optical properties that allow for more transistors to be delivered in a package, providing better scaling and enabling the assembly of larger chiplet complexes. Intel is driving glass substrate technology and supply chain for advanced packaging solutions and plans to deliver this breakthrough innovation to the market in the second half of this decade.

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Dr. Hamid Azimi

Corporate VP, Director of Substrate Packaging TD

Intel

Dr Hamid Azimi, an Intel VP in Technology Development group, is responsible for advanced substrate packaging for all Intel logic products across substrate suppliers’ factories, as well as the company’s two internal substrate R&D factories. These R&D factories are the birthplace of panel level die embedding technology and play a crucial role for enabling EMIB, the key technology to Intel’s data-centric business and heterogenous packaging. His team works with equipment, material, chemical and substrate suppliers to develop Si-fab backend-like technologies for panel level advanced packaging, and transfer technologies to Intel supplier factories to meet the demand of future Intel products.

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Intel (Nasdaq: INTC) is an industry leader, creating world-changing technology that enables global progress and enriches lives. Inspired by Moore’s Law, we continuously work to advance the design and manufacturing of semiconductors to help address our customers’ greatest challenges. By embedding intelligence in the cloud, network, edge and every kind of computing device, we unleash the potential of data to transform business and society for the better.

To learn more about Intel’s innovations, go to newsroom.intel.com and intel.com.

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  • 09:10 – 09:40

Keynote

TBC

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ST Liew

President, Taiwan & SEA Australia, New Zealand Vice President

Qualcomm

ST Liew is a Vice President of Qualcomm Technologies, Inc. and the President of Qualcomm Taiwan and South East Asia, Australia, New Zealand. ST was born in Malaysia and was educated in Malaysia, Singapore and the UK. His permanent home is Singapore.

In this role, ST is responsible for leading all business and operational functions for Qualcomm in the region. Prior to this role, ST served as the Vice President and President of Qualcomm Taiwan.

ST has more than 30 years of experience leading businesses and R&D in the telecommunication industry. Most recently ST was the President of Acer’s new Business Group SPBG that focused on R&D and Sales of non PC lines of product for the global market while living in Switzerland and later in Taiwan.

Before joining Acer, ST was in Motorola for over 18 years leading Regional R&D Teams and later in Product planning, business Teams across the world in products ranging from Mobile radios, Pagers, Data terminals to Cellular phones. ST has lived in China, Korea, USA and India during his tenure.

Liew received his MBA from the National University of Singapore, and holds a BSc. in Electrical and Electronic Engineering from the University of Leeds, UK.

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Qualcomm is the world’s leading wireless technology innovator and the driving force behind the development, launch, and expansion of 5G. When we connected the phone to the internet, the mobile revolution was born. Today, our foundational technologies enable the mobile ecosystem and are found in every 3G, 4G and 5G smartphone. We bring the benefits of mobile to new industries, including automotive, the internet of things, and computing, and are leading the way to a world where everything and everyone can communicate and interact seamlessly.

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  • 09:15 – 09:40

Keynote

Renesas’ Technology Strategy for a Paradigm Shift in the Semiconductor Industry

The semiconductor industry is in the midst of a paradigm shift together with its applied systems triggered by digitalization accelerated by AI technology evolutions in all the systems like evident trends of electrifications and SDV (Software Defined Vehicle) in the automotive industry. As the magnitude and complexity of its applied systems grow exponentially, semiconductor solutions need to integrate more, execute faster with less power, and realize users much better development productivity. Renesas believes the challenge is resolved by building system-oriented solutions for integrations and improving UX (User Experience) values like easier to develop for users. The keynote speech addresses Renesas’ attempts with innovative technologies like chiplet and digitalization/virtualization for system development environment.

Watch on ISES TV > PPTs in ISES Docs >
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Shinichi Yoshioka

Senior Vice President and Chief Technology Officer

Renesas

Mr. Yoshioka serves as the Senior Vice President and CTO at Renesas. He was appointed to these roles in August 2019, from his experience and technological expertise of the products and the market following the years he has dedicated to Renesas.

He began his career in Hitachi, Ltd in 1986. Since Renesas Electronics Corporation was established in 2010 based on Hitachi, Mitsubishi Electric, and NEC Electronics, he has held many key roles, such as the Vice President of Automotive Control and Analog & Power Systems Business Division, Safety Solution Business Division, and the Senior Vice President of the Automotive Solutions Business Unit.

He has a Bachelor of Engineering degree in Applied Physics from the University of Tokyo and graduated from Stanford University with a Master of Science in Electrical Engineering.

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Renesas Electronics empowers a safer, smarter and more sustainable future where technology helps make our lives easier.

A leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live.

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  • 09:20 – 09:30

Advanced Packaging/Substrate Materials and Open innovation Platform

An increased density of IC chips and other components to increase processing speed highly will be required for post-5G/6G systems. Therefore, there is a need for technologies that allow for high-density packaging of differing chips within a single semiconductor package. In this presentation, Advanced Packaging and Substrate materials trend such as organic core, dry film, solder resist, PID for RDL and glass related materials would be introduced.

Furthermore, Open innovation activity using Resonac’s Advanced Packaging pilot line would be discussed. Resonac has started Packaging Solution Center to propose one-stop solution for customers in 2019 and established the co-creative packaging evaluation platform “JOINT2” with leading companies to accelerate the development of advanced materials, equipment and substrates for 2.xD and 3D package. We are developing fine vertical/lateral interconnect technology and the study of fabrication and reliability for the extremely large advanced package. This presentation will cover these Resonac’s co-creation activities and development.

PPTs in ISES Docs >
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Hidenori Abe

Electronics R&D Center GM

Resonac Corporation

Mr. Abe is leading R&D of semiconductor materials in general and promoting co-creation activities at Resonac, which is an integrated company of Showa Denko K.K. and Showa Denko Materials Co., Ltd., (formerly Hitachi Chemical Co., Ltd.), After serving as a General manager of CMP slurry business sector and a corporate marketing manager at Hitachi Chemical.

He was involved in the launch of the Packaging Solution Center, which is open innovation hub in advanced packaging development.

He had been engaged in the development of semiconductor molding compounds since 1998.

He holds an Executive MBA from Oxford, UK.

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On January 1, 2023, Showa Denko K.K. and Showa Denko Materials Co., Ltd. merged and transformed themselves into newly integrated company “Resonac”. Resonac defines its purpose as “Change society through the power of chemistry.” Resonac aims to be a world-class functional chemical manufacturer, creating functions necessary for the times, supporting technological innovation, and contributing to the sustainable development of our customers. Resonac is Global No.1 semiconductor materials supplier (except for Si wafer). In order to achieve technological innovation for solving various social issues, it is essential for us to make wide-ranging co-creative efforts with partners, and Resonac is open to collaboration including 1on1 co-development with any partner.

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