• 08:00 – 08:50

Registration

  • 09:00 – 09:20

ISES Welcome Address

Salah Nasri photo

Salah Nasri

President

ISES

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International Semiconductor Executive Summits (ISES) holds a significant position within the semiconductor industry. Since 2010 we have scaled 8 major successful regional events globally. Our initiatives to date have been fully supported by local governments. For e.g., ISES USA is hosted in partnership with the Greater Phoenix Economic Council, ISES Taiwan is hosted in partnership with ITRI, ISES EU is hosted in partnership with the EU Commission, ISES Southeast Asia in partnership with Invest in Penang. We serve as a platform where senior executives in technology, manufacturing and R&D from various semiconductor companies, technology providers, and related industries gather to exchange information, shape strategies, and discuss the industry’s direction. Our summits have influenced industry trends and decisions due to the high-level discussions that take place.

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ISES

HPC Session

  • 09:20 – 09:50

Keynote

Innovation to Enable More Compute From Each Transistor

For decades, Moore’s Law has delivered the ability to integrate an exponentially increasing number of devices in the same silicon area at a roughly constant cost. This has enabled tremendous levels of integration, where the capabilities of computer systems that previously occupied entire rooms can now fit on a single integrated circuit. Although traditional scaling has slowed over the past decade, we have made tremendous progress as an industry with new approaches including chiplet-based architectures, domain-specific accelerators, and advanced packaging technologies which have enabled major milestones including the first exascale supercomputers. As we look into the future, we need to accelerate the pace of innovation to drive the next decade of advancement in high-performance computing. By far, the largest limiting factor to delivering continued compounded growth in computation power is energy efficiency. In this paper, we highlight a holistic strategy for accelerating innovation in energy efficiency required for next-generation high-performance computing and ultimately achieving zettascale performance.

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Dr. Bill En photo

Dr. Bill En

CVP, Foundry Technology and Operations

AMD

26 years of experience in the Semiconductor Industry ranging from silicon wafer R&D, process technology, circuit design and foundry technology with over 65 patents and 30 publications. He graduated from Univ. of California Berkeley with a Ph.D in Electrical Engineering and Computer Sciences in 1996. He is currently Corporate Vice President at Advanced Micro Devices overseeing Foundry technology from initial R&D through production for all AMD products.

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For 50 years, AMD has driven in high-performance computing, graphics, and visualization technologies – the building blocks for gaming, immersive platforms, and the datacenter. Hundreds of millions of consumers, leading Fortune 500 businesses and cutting-edge scientific research facilities around the world rely on AMD technology daily to improve how they live, work and play. AMD employees around the world are focused on building great products that push the boundaries of what is possible. For more information about how AMD is enabling today and inspiring tomorrow, visit AMD (NASDAQ:AMD) on their website, blog, Facebook and Twitter pages.

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AMD
  • 09:50 – 10:20

Keynote

Now is the Time to Re-imagine Memory Centric Computing

Over the last several decades, systems have focused on innovation in the logic and have strayed away from ‘balanced’ machines. As a result, a significant

number of applications have been unable to leverage the additional computational power of the latest generation machines . The machine architectures need to evolve: new systems architectures and innovations require a deep understanding of the applications. Memory will be the ‘cornerstone’ of future innovative systems, which will generate a faster time to solution in a much more energy constrained envelope.

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Steve Pawlowski photo

Steve Pawlowski

CVP Advanced Memory Systems

Micron Technology, Inc.

Steve Pawlowski is corporate vice president of advanced computing solutions at Micron Technology. He is responsible for defining and developing innovative memory solutions for the enterprise and high-performance computing markets.

Prior to joining Micron in July 2014, Steve was a senior fellow and the chief technology officer for Intel’s Data Center and Connected Systems Group. His extensive industry experience includes 31 years at Intel, where he held several high-level positions and led teams in the design and development of next-generation system architectures and computing platforms.

Steve earned bachelor’s degrees in electrical engineering and computer systems engineering technology from the Oregon Institute of Technology and a master’s degree in computer science and engineering from the Oregon Graduate Institute. He also holds 58 patents.

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Micron is a world leader in innovative memory solutions that transform how the world uses information. For over 40 years, our company has been instrumental to the world’s most significant technology advancements, delivering optimal memory and storage systems for a broad range of applications.

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Micron Technology, Inc.
  • 10:20 – 11:20

Coffee Break Sponsored by CNW Business Meeting Slot 1 & 2, Networking and Coffee Break

CNW

Advanced Packaging Session

  • 11:20 – 11:50

Keynote

Unleash Product Innovations with 3DFabric

With the development of 3DIC and associated packaging technologies, semiconductor industry has extended performance and density optimization to system level, complementary to traditional chip scaling. Amid broader adoption of TSMC’s advanced 2.5D/ 3D packaging solutions along with growing chiplet complexity and form factor, the interaction between Si, packaging and components become increasingly crucial and requires continue innovations on design, process development and manufacturing.

With 3DFabric Alliance, we are extending OIP collaboration to packaging/ testing and working with industry partners on substrate and memory technology development for integrated system-level design solution to customers, together with the ecosystem of OSATs, material and equipment suppliers. In parallel, we also establish the worldwide first fully automated factory to offer best flexibility for our customers to optimize their packaging solution with better cycle time and quality control.

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Kam Lee photo

Kam Lee

eputy Head of TSMC Advanced Packaging Technology and Service.

TSMC

Kam is currently the Deputy Head of TSMC Advanced Packaging Technology and Service. He joined TSMC earlier last year in March 2022 from Intel, where he served for 27 years in various roles in technology development, product development and high-volume manufacturing. Previously, he held the role as the Vice President and General Manager in Intel’s product engineering development group. At TSMC, Kam is actively working with his colleagues to advance the TSMC advanced packaging and testing technologies to serve its foundry customers.

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TSMC pioneered the pure-play foundry business model when it was founded in 1987 and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.

TSMC deployed 281 distinct process technologies and manufactured 11,617 products for 510 customers in 2020 by providing broadest range of advanced, specialty and advanced packaging technology services. TSMC is the first foundry to provide 3-nanometer production capabilities, the most advanced semiconductor process technology available in the world. The Company is headquartered in Hsinchu, Taiwan.

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TSMC
  • 11:50 – 12:20

Keynote

Heterogeneous Integration Platform for Next Generation Computing

Today’s era of smartphones, 5G, AI and big data calls for increasingly faster speeds of computing performance. However, the speed of semiconductor innovation and technology advancement has slowed down, and chip miniaturization has reached physical limits, which has caused the speed at which transistors are growing smaller to slow down. In other words, we are now falling behind Moore’s Law.

Advances in heterogeneous chip packages are need to empower today is the device manufacturers to pursue tomorrow’s breakthrough. Both 2.5D and 3D will be needed to keep innovation vibrant also higher bandwidths and density solution is important for HPC and AI systems. So memory coherency and low latency attributes across converged compute infrastructures with interconnect technologies including UCIe.

In this paper, advanced package solutions are to be introduced and discussed in terms of challenges and opportunities for emerging high end computing, memory and mobile platforms.

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Dr. Seungwook Yoon photo

Dr. Seungwook Yoon

CVP Business Development Team, AVP

Samsung Electronics

Dr. YOON is currently working as Corporate VP/Business Development Team, AVP, Samsung Electronics

Prior to joining Samsung, He was director of group technology strategy, STATS ChipPAC, JCET Group. He also worked deputy lab director of MMC (Microsystem, Module and Components) lab, IME (Institute of Microelectronics), A*STAR, Singapore. YOON received Ph.D degree in Materials Science and Engineering from KAIST, Korea. He also holds MBA degree from Nanyang Business School, Singapore. He has over 300 journal papers, conference papers and trade journal papers, and over 20 US patents on microelectronic materials and electronic packaging. Served as technical committee member of various international packaging technology conferences, EPTC, ESTC, iMAPS, IWLPC and SEMI.

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Samsung Electronics Co., Ltd. engages in the manufacturing and selling of electronics and computer peripherals. The company operates through following business divisions: Consumer Electronics, Information Technology & Mobile Communications and Device Solutions. The Consumer Electronics business division provides cable television, monitor, printer, air-conditioners, refrigerators, washing machines and medical devices. The Information Technology & Mobile Communications business division offers handheld products, communication systems, computers and digital cameras. The Device Solutions business division comprises of memory, system large scale integrated circuit and foundry. The company was founded on January 13, 1969 and is headquartered in Suwon, South Korea.

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Samsung Electronics
  • 12:20 – 12:40

New Energy to Semiconductor – Heterogeneous Integration Packaging

Heterogeneous Integration (HI) is now one of key semiconductor worldwide trends and developing important impact and increasing influence to chip designer, Fab, OSAT, OEM/ODM and entire supply-chain enablers. The view on impact and influence can be pretty different to mobile, IoT, HPC, and automotive applications’ system developers based on various HI solutions. This presentation will discuss the HI packaging as a new enabling energy for semiconductor migration.

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Dr. C.P. Hung photo

Dr. C.P. Hung

Corporate VP RD

ASE

Dr. C.P. Hung currently holds the position of Vice President, Corporate R&D, at ASE Group. Based in Taiwan, he leads teams responsible for next-generation product development featuring integrated technologies, as well as a broad range of advanced chip, package, and system integration solutions with multiple ASE and USI Sites.

During his tenure, Dr. Hung has performed a variety of management roles at ASE, including VP of Corporate Design, VP of Central Engineering & Business Development and VP of Logistic Services Integration. He holds 180 patents encompassing IC packaging structure, process, substrate and characterization technology. He has also published over 104 conference and journal papers.

Dr. Hung is a board of governor of IEEE EPS since 2019. He has being the SEMICON Taiwan PKG & TEST Committee Chair since 2013, and currently Co-Chair since 2021.

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ASE is the leading global provider of semiconductor manufacturing services in assembly and test. With a proven track record spanning almost 40 years, ASE today is at the forefront of flexible, powerful, integration technologies that achieve criteria for improved power, performance, area, and cost requirements. Our comprehensive toolbox leveraging innovative technologies, such as die interconnection, wafer level fan out, embedded devices, conformal and compartmental shielding, integrated antenna, and others, are being refined and enhanced to support future generations of system integration. Heterogenous Integration through SiP is enabling significant innovation across dynamic application areas including AI, 5G, automotive, mobile, IoT and more. Our industry is driven by innovation, and through ASE’s miniaturization technologies, we are enabling transformative solutions that are literally changing lives, from health to transportation, from Robotics to AI, from IoT to 5G.

Website: ase.aseglobal.com

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ASE
  • 12:40 – 13:40

Buffet Lunch

  • 13:45 – 14:05

A 360 View of Semiconductor Test from AI and Security Perspective

This keynote will explore the impact of deep learning including large language models on the semiconductor test. We will highlight the opportunities these models present for real-time data processing and discovery of insights, with specific applications in computer vision and natural language processing. However, the use of these models also introduces new security risks, particularly regarding the use of cloud infrastructure for collection of data, training and inference. By examining past attacks on networks, we will discuss the potential for malicious actors to steal data or intellectual property from companies. Attendees will gain an understanding of the opportunities and challenges in AI and security for the coming years and the importance of considering security measures in the development and deployment of these advanced solutions.

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Michael Chang photo

Michael Chang

VP & GM, Advantest Cloud Solutions

Advantest

Michael Chang is the Vice President and General Manager of Advantest Cloud Solutions (ACS), a strategic business unit within Advantest Corporation to enable customers in the Advantest value chain to deliver improved yield, quality, and time to volume / market. Michael boasts 25 years of diverse experience leading product innovations and business growth across AI/Machine Learning, Cloud Datacenter and Semiconductor spaces. Before joining Advantest, Michael was the General Manager of AI Solutions business at Supermicro Computer. Prior to Supermicro, he was the Co-founder of a deep learning startup company. He has also held multiple leadership roles at several IC companies including LSI, Marvell, and Vitesse semiconductor. Michael holds an MBA degree from Haas Business School at UC Berkeley, a bachelor degree in Electronics and Communications Engineering from the National Chiao Tung University and has completed the Executive Leadership Program from Stanford’s Graduate School of Business.

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Advantest (TSE: 6857) is the leading manufacturer of automatic test and measurement equipment used in the design and production of semiconductors for applications including 5G communications, the Internet of Things (IoT), autonomous vehicles, artificial intelligence (AI), machine learning, smart medical devices and more. Its leading-edge systems and products are integrated into the most advanced semiconductor production lines in the world. The company also conducts R&D to address emerging testing challenges and applications, produces multi-vision metrology scanning electron microscopes essential to photomask manufacturing, and offers groundbreaking 3D imaging and analysis tools. Founded in Tokyo in 1954, Advantest is a global company with facilities around the world and an international commitment to sustainable practices and social responsibility. More information is available at www.advantest.com.

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Advantest
  • 14:05 – 14:15

Hybrid Bonding: Innovation to Adoption

Hybrid bonding allows semiconductor wafers or individual die to be bonded with exceptionally fine-pitch (scalable to 1 micron) 3D electrical interconnects at low temperature without pressure or adhesives. Hybrid bonding was invented by a company called Ziptronix which was later acquired by Adeia (formally known as Xperi) in 2015. Since then, Adeia has continued to invest heavily in hybrid bonding R&D and supply chain enablement for production worthy wafer-to-wafer and die-to-wafer hybrid bonding processes. Adeia, a pioneer in hybrid bonding, has licensed numerous semiconductor companies to the bonding portfolio including Sony, SK hynix, Samsung, Micron, Kioxia, Western Digital, Qorvo, Canon, LAPIS, and UMC. Several of these companies engaged in a technology transfer program as well. Hybrid bonding technology was commercially adopted in stacked BSI image sensors, stacked 3D NAND memories, logic processors, and is anticipated to be adopted soon in HBM and RF front-end devices. In logic applications, a large die can be disaggregated into separate functions such as cache memory and processor. After disaggregation, the functional chiplets can be bonded on top of a core processor die to create a fully functional circuit. The hybrid bonding technology is a must-have tool to provide a multi-generational roadmap of products in high performance computing devices such as CPU, GPU, FPGA, SoC, other logic, memories, and 3D chiplet integrations.

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Abul Nuruzzaman photo

Abul Nuruzzaman

VP, Technology and IP Licensing

Adeia

Abul Nuruzzaman is VP of Semiconductor Technology and IP Licensing at Adeia, Inc. (formally known as Xperi), San Jose, California. Prior licensing role, he led the marketing of Adeia’s hybrid bonding technology and semiconductor IP portfolio. Throughout his successful semiconductor industry career, Abul worked in product management, marketing and business development roles at AMD, Infineon (Cypress Semiconductor), TE Connectivity and Lattice Semiconductor. He holds BSEE degree from Osaka University, Japan, and MSEE degree from the University of California, Los Angeles (UCLA).

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Adeia invents, develops and licenses fundamental innovations that shape the way millions of people explore and experience entertainment and enhance billions of devices in an increasingly connected world. Leveraging the combination of highly experienced technologists, scientists, engineers and advanced R&D labs in San Jose, California and Raleigh, North Carolina, Adeia develops industry-leading 3D integration solutions such as hybrid bonding that meet the demand for greater functionality, higher performance and smaller size for next generation electronics.

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Adeia

Automotive and Power Semiconductor Panel Session

  • 14:15 – 14:35

GaN is Accelerating e-Mobility

Driven by evolving consumer preferences and regulatory pressure, it’s a consensus that the adoption of electric vehicles will continue its sharp growth trajectory in the coming years. Leading automakers and suppliers have announced rigorous investments and visionary plans to meet the booming demand. Driven by the need for longer ranges and more efficient charging capacity, EV power electronics undergo a paradigm shift toward wide bandgap semiconductors. With mature manufacturing capacity and proven reliability, GaN is changing the game for 400V and 800V EV applications by delivering unprecedented benefits in power density and even BoM cost with superior switching frequency and loss performance.

In addition, electric micro-mobility is gaining traction worldwide as it provides a greener, less expensive, and more flexible last-mile transportation option in urban areas. For applications where small size is critical, GaN has turned a new page for power electronics in two-wheeler, three-wheeler, and microcar applications.

Stephen Coates, General Manager (Asia) and VP of Global Operation of GaN Systems will address how GaN is widening its applications and making disruptive innovations in the future of mobility.

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Stephen Coates photo

Stephen Coates

GM & VP Global Operations

GaN Systems

Stephen has previously held executive level engineering & operations roles in silicon & compound semiconductor & displays technology companies including VP Operations at DigiLens, VP Operations at Symmorphix Thin Films Inc, VP Operations at Fultec Semiconductor Inc/Bourns & VP Production Engineering at MaxQ Technology heading up power module design & manufacture. A seasoned technology executive with 30 years’ experience in engineering, manufacturing operations, supply chain management and quality. Stephen has substantial experience in establishing and developing strategic supply chain relationships to support full product commercialization and high volume manufacturing, while also being an expert in device packaging, process development and integration. Stephen also previously held lead assessor qualifications for 3rd party audit to ISO 9000 & equivalent standards (eg TS16949/AS9100).

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GaN Systems
  • 14:40 – 15:20

Opportunities and Challenges for Power Semiconductor Industry. How can Taiwan Supply Chain Help?

Moderator
Andy Chuang photo

Andy Chuang

VP Business Development

GaN Systems

GaN Systems

Mr. Chuang received his M.S. degrees in Electrical Engineering of National Tsinghua University. After graduated, he joined UMC R&D to start his professional career. Starting from R&D to give him sold knowledge in wafer manufacturing. Technical Marketing let him connect wafer manufacturing and product application jointly. Gradually involving sales and expat to Europe to manage key customers. Completely training to make him realize wafer business and supply chain. After UMC, he joined EDA vendor, Synopsys. This experience helped him connecting chip design to wafer manufacturing. After that, he joined CSMC in China as VP of marketing and sales. He led company to have creative ideas to customize BCD processes targeting to specific application and won the China market, such as Class A/B, Class D, Charger, PMIC, LED display, and LED lighting. In 2013, he joined Episil, started business in compound semiconductor (SiC and GaN-on-Si). He is the one who run both SiC and GaN-on-Si at the same, and delivered supreme manufacturing cycletime, production yield to customers. He started new career in GaN Systems from 2022. GaN Systems is a trusted company which can deliver GaN devices to Automotive and High Rel application. GaN Systems enables power conversion companies to revolutionize their industries and transform the world.

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Panelist
Walter Chen photo

Walter Chen

SVP Greater China Sales & Marketing

Amkor Technology, Inc.

Amkor Technology, Inc.

Walter joined Amkor in 2020 and is currently Sr. Vice President responsible for Sales & Marketing in Greater China. Prior to joining Amkor, Walter worked for Cree, Inc 17 years as a position for VP of LED Chips Marketing WW & LED Component Marketing in Asia. Also as a Board member of Lextar representative for Cree. Prior to Cree, he had 6 years of IC design house experience. He has 28 years of Semiconductor industry experience in total, focused on Sales & Marketing field. He holds a Master degree of Engineering Business Management from University of Warwick in UK.

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As one of the world’s largest providers of high-quality semiconductor packaging and test services, Amkor has helped define and advance the technology landscape.

We deliver innovative solutions and believe in partnering with our customers to bring 5G, AI, Automotive, Communications, Computing, Consumer, IoT, Industrial and Networking products to market.

As a truly global supplier, Amkor has manufacturing and test capabilities as well as product development and support offices in Asia, Europe and the US.

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Panelist
Ian Chan photo

Ian Chan

CTO & Managing Director

Cyntec

Cyntec

Education

  • PhD EECS, University of Michigan USA (1992)

Professional Experience:

  • CEO, Episil Holding Inc. (2013-2016)
  • CSO, Hermes-Epitek (2016-2018)
  • Independent Director, UNIVERSAL CEMENT CORPORATION(2017~ )
  • CTO&Managing Director, Cyntec Co., Ltd. (2019~ )
  • Chairman, Power Forest Technology Corporation(2019~ )
  • Independent Director, Excelliance MOS Corporation(2021~ )
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Since 1991 Cyntec’s team of scientists and engineers have been known to lead the way in the research and development of the miniaturized and highly integrated products and solutions. The product lines consist of magnetic components, passive components, power modules, RF & optical modules which serve the client, cloud computing equipment, automotive, IOT, industry, and other market segments.

Using our insight into market trends and the in depth knowledge of electronic materials and processes, we have been able to produce a wide variety of products with the highest levels of performance, high power handling, high density packaging and tight accuracy.

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Panelist
Stephen Coates photo

Stephen Coates

GM & VP Global Operations

GaN Systems

GaN Systems

Stephen has previously held executive level engineering & operations roles in silicon & compound semiconductor & displays technology companies including VP Operations at DigiLens, VP Operations at Symmorphix Thin Films Inc, VP Operations at Fultec Semiconductor Inc/Bourns & VP Production Engineering at MaxQ Technology heading up power module design & manufacture. A seasoned technology executive with 30 years’ experience in engineering, manufacturing operations, supply chain management and quality. Stephen has substantial experience in establishing and developing strategic supply chain relationships to support full product commercialization and high volume manufacturing, while also being an expert in device packaging, process development and integration. Stephen also previously held lead assessor qualifications for 3rd party audit to ISO 9000 & equivalent standards (eg TS16949/AS9100).

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Panelist
Dr. Wei-Chung Lo photo

Dr. Wei-Chung Lo

Deputy General Director, Electronic & Optoelectronic System Research Laboratories (EOSL)

ITRI

ITRI

Dr. Lo received his Ph.D. from National Taiwan University and joined Industrial Technology Research Institute to work in advanced electronic packaging, such as WLP, 3D IC/3D stacking, fan-out, heterogeneous integration technology for more than 20 years, 85 papers and 40 patent granted. Currently, he also serves as TWG chair of IoT Chapter of IEEE Heterogenous Integration Roadmap(HIR) and chairman of International Microelectronics Assembly and Packaging Society (IMAPS)-Taiwan chapter.

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ITRI is a world-leading applied technology research institute with more than 6,000 outstanding employees. Its mission is to drive industrial development, create economic value, and enhance social well-being through technology R&D. Founded in 1973, it pioneered in IC development and started to nurture new tech ventures and deliver its R&D results to industries. ITRI has set up and incubated companies such as TSMC, UMC, Taiwan Mask Corp., Epistar Corp., Mirle Automation.

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  • 15:20 – 16:20

Coffee Break Sponsored by CNW Business Meeting 3 & 4 Networking and Coffee Break

CNW

Equipment and Service Supplier Session

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