• 08:00 – 08:30


Revitalizing Domestic Semiconductor Manufacturing: Challenges, Opportunities and Emerging Applications

With the passage and signing of the CHIPS and Science Act of 2022, companies in and adjacent to the semiconductor industry are working on plans to help revitalize domestic manufacturing, develop the workforce, strengthen American supply chains, and accelerate the technologies of the future. During this keynote talk, SkyWater President and CEO Thomas Sonderman will talk about how a company like SkyWater can address the challenges of bringing chip manufacturing back to the U.S., invest in opportunities for supply chain certainty and security and enable nimble new innovations that can be accelerated with CHIPS funding to lead the next wave of computing.

Watch on ISES TV > PPTs in ISES Docs >
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Thomas Sonderman

President & CEO

SkyWater Technology

Thomas Sonderman is the president and CEO of SkyWater Technology, a U.S.-owned and operated pure-play semiconductor manufacturer and a DOD-accredited Trusted supplier. He joined SkyWater in 2017 as the lead executive, driving the company’s successful business transformation from an IDM to a pure play foundry. He has effectively diversified SkyWater’s customer base by defining new product markets and target customers while simultaneously improving operational efficiencies. Mr. Sonderman has leveraged SkyWater’s U.S-based manufacturing operations to expand the company’s government business and to focus on reinstating a strong domestic commercial manufacturing presence. He has built a world class leadership team that inspires over 500 employees to deliver process R&D innovation and operational excellence.

Mr. Sonderman’s extensive industry experience in all aspects of fab operations has delivered market leadership and increased shareholder value to high-technology industry leaders Rudolph Technologies, Globalfoundries and AMD. Notably, he played a critical role serving as part of an executive team at AMD that spun-off manufacturing operations to form Globalfoundries.

A widely recognized subject matter expert, Mr. Sonderman is the author of 50 patents and a highly sought-after industry speaker. He received a Bachelor of Science degree in chemical engineering from Missouri University of Science Technology and a Master of Science degree in electrical engineering from National Technological University.

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SkyWater (NASDAQ: SKYT) is a U.S.-owned semiconductor manufacturer and a DOD-accredited Trusted supplier. SkyWater’s Technology as a Servicesm model streamlines the path to production for customers with development services, volume production and advanced packaging solutions in its world-class U.S. facilities. This pioneering model enables innovators to co-create the next wave of technology with diverse categories including mixed-signal CMOS, read-out ICs, rad-hard, power discretes, MEMS, superconducting ICs, photonics, carbon nanotubes and interposers. SkyWater serves growing markets including aerospace & defense, automotive, biomedical, cloud & computing, consumer, industrial and loT. For more information, visit: www.skywatertechnology.com.

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  • 08:30 – 09:00


Advancing The Memory Solutions Roadmap To Enrich Our Multi-Dimensional World For Generations To Come

A memory and storage hierarchy evolution is unfolding before us. Homogenous data centers that met our needs in the past, will not meet our future needs.

We must look to heterogenous solutions that require an expansion of the current memory hierarchy, and ultimately, a convergence of memory and storage.

Conventional scaling must continue, while disruptive 3D, and other advanced solutions will emerge to move us into the next few decades of memory advancement.

Advanced Packaging solutions will play a critical role in this expanded hierarchy, but to achieve this monumental shift, the collaboration, knowledge-sharing, and

innovation our industry has relied on to extend Moore’s Law over the past decade must now push the boundaries, to move the packaging supply chain to a front-end like model.

At the same time, we must keep focus on more sustainable and cost-effective solutions while building a strong talent-based workforce to support long-term growth.

We face many near-term challenges to enable this new ecosystem, but if successful, our industry will emerge with a longer-term roadmap that impacts and enriches lives for generations to come.

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Naga Chandrasekaran

SVP Technology Development

Micron Technology, Inc.

Naga Chandrasekaran is senior vice president of technology development at Micron Technology. Dr. Chandrasekaran leads Micron’s global technology development and engineering efforts related to the scaling of current memory technologies, advanced packaging technology, as well as investigating emerging memory technology solutions to support Micron’s future requirements. He also manages mask technology development, corporate characterization labs, advanced modeling and data analytics, and R&D fabrication operations at Micron’s headquarters in Boise, Idaho. He was appointed to his current position in 2019.

In 2001, Dr. Chandrasekaran joined Micron as a CMP development engineer and since then has held a series of positions of increasing responsibility in process and equipment development across multiple R&D process areas, leading manufacturing and technology transfer efforts, integration of new business units, and development of solar, LED and display technology. From 2007 to 2008, he also served as fab engineering manager for IM Flash, Singapore Operations. He most recently served as senior vice president of process research and technology development.

Dr. Chandrasekaran has authored several keynote publications and patents, and he has served as an invited panel speaker at several conferences. He has also received several awards, including Jiri Tlusty Outstanding Young Manufacturing Engineer of the Year, awarded by the Society of Manufacturing Engineers in 2003, and Engineering Manager of the Year, awarded by the American Society of Engineering Management (ASEM) in 2018.

Dr. Chandrasekaran earned a bachelor’s degree in mechanical engineering from the University of Madras. He earned both a master’s and a doctorate degree in mechanical engineering from Oklahoma State University and dual executive MBAs from the University of California, Los Angeles (UCLA-Anderson School of Management) and the National University of Singapore.

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Micron is a world leader in innovative memory solutions that transform how the world uses information. For over 40 years, our company has been instrumental to the world’s most significant technology advancements, delivering optimal memory and storage systems for a broad range of applications.

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  • 09:00 – 09:30

Technologies To Break The Walls Slowing Compute Systems Scaling

Transistor density in chips continues to follow Moore’s law, but the node to node logic performance improvements have slowed down. Memory and power walls limit compute system performance. Future compute systems will increasingly rely on new materials, new device architectures and system technology co-optimization to realize benefits beyond pure density scaling of compute, connect and store technologies. This talk will highlight technology innovations in logic, memory and 3D integration that will enable continued compute systems scaling. With the anticipated semiconductor industry growth in the next decade, we also need collective action to address the carbon footprint of semiconductor manufacturing.

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Sri Samavedam

SVP, CMOS Technologies


Sri Samavedam is SVP of CMOS Technologies at imec since Aug 2019. His responsibilities include programs in logic, memory, photonics and 3D integration. Prior to that, he was senior director of technology development at Globalfoundries in Malta, NY, where he led qualification of 14nm FinFET technology and derivatives into volume production and early development of 7nm CMOS.

He began his research career at Motorola in Austin, TX, working on strained silicon, metal gates, high k dielectrics and fully-depleted SOI devices. He holds a Ph.D. in Materials Science and Engineering from MIT and a masters from Purdue University.


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Imec is a world-leading research and innovation center in nanoelectronics and digital technologies. Imec leverages its state-of-the-art R&D infrastructure and its team of more than 5,500 employees and top researchers, for R&D in advanced semiconductor and system scaling, silicon photonics, artificial intelligence, beyond 5G communications and sensing technologies, and in application domains such as health and life sciences, mobility, industry 4.0, agrofood, smart cities, sustainable energy, education, … Imec unites world-industry leaders across the semiconductor value chain, Flanders-based and international tech, pharma, medical and ICT companies, start-ups, and academia and knowledge centers. Imec is headquartered in Leuven (Belgium), and has research sites across Belgium, in the Netherlands and the USA, and representation in 3 continents. In 2021, imec’s revenue (P&L) totaled 732 million euro.

Further information on imec can be found at www.imec-int.com.

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  • 09:30 – 10:30

Time to Collaborate. SubFAB Research and Development.

Workshop by International SubFAB Research Labs Initiative (ISRL)

One of the key areas poised to become a showstopper for the industry’s ability to achieve sustainability goals is commonly called SubFAB. Existing infrastructure can’t support true game changing development of environmentally friendly and affordable solutions to match the manufacturing technologies advancement cadence.

International SubFAB Research Labs (ISRL) initiative will enable an industry-wide collaborative effort. Member companies will gain access to a dedicated facility with a complete infrastructure required to operate a set of 300mm process tools to enable a science based research focusing on reliability issues, technology validation, pathfinding, materials handling and reclaim.

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Ilya Zabelinsky


International SubFAB Research Labs Initiative (ISRL)

Ilya Zabelinsky is a globally recognized Technical Leader with over 25 years of experience in vacuum and gas abatement applications for Semiconductor manufacturing.

Ilya joined Intel in 1996 to take part in startup and commissioning team of first 200mm fab in Israel, moving on to develop his career as operational and technical leader through several technology node transitions and manufacturing capacity expansion projects. In 2006 Ilya spearheaded an effort to install and commission a full set of vacuum and gas abatement systems for a greenfield construction of 300mm Fab in Kiryat Gat, extending his operational and technical leadership to entire SubFAB ecosystem supporting technology transitions and capacity expansion projects from 45 to 10nm.

In April 2022 Ilya left Intel on a mission to “bring the Science to SubFAB” by supplementing Semiconductor manufacturing technologies advancement with focused research of unwanted and harmful side effects caused by unreacted process materials downstream from process chambers.

In May 2022 Ilya co-founded International SubFAB Research Labs (ISRL).

Ilya possesses broad knowledge and vast practical experience in wide range of semiconductor manufacturing processes, FAB equipment, central facilities systems and infrastructure, spanning from scope definition, programming and design through construction, commissioning and operations. Ilya holds a B.Sc in Chemical Engineering from SCE, Israel. Ilya is passionate practitioner of various education and mentoring programs aimed at new generations of professional and diverse workforce.

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  • 09:30 – 10:30

Networking Break & Business Meetings 5+6

  • 10:30 – 11:00

Wall Street Perspectives on the Semiconductor Market

The presentation will apply a financial lens to the current state of the semiconductor industry. The discussion will evaluate key industry and economic trends, and assess factors that will shape the industry in years to come, including government support and regulations. It will also provide perspectives on sector valuations, strategic transaction activity and potential future consolidation.

Watch on ISES TV > PPTs in ISES Docs >
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Tom Stokes

Senior Managing Director


Tom Stokes is a Senior Managing Director of Evercore’s corporate advisory business and co-leads the Technology Banking Group in New York.

Tom is focused on advising clients across the technology sector.

Prior to joining Evercore in 2015, Tom was a Managing Director in the Investment Banking Division at Goldman, Sachs & Co., where he served as global head of Electronics and Industrial Technology Investment Banking. With over 25 years of relevant experience and over 13 years at Goldman Sachs, Tom has extensive experience advising companies across the technology industry. In particular, he has advised on a number of the most notable recent transactions across the semiconductor, electronics and industrial tech subsectors. Clients represented by Tom include Advanced Energy, Aeroflex, Anaren, Amphenol, AZ Electronic Materials, Azenta, Belden, Brooks, CDW, Cobham, Corning, Dover, Dupont, Edwards, Entegris, Fortive, Freescale, IBM, Lam Research, Lexmark, Macom, Molex, Keysight, Koch Industries, TE Connectivity, Samsung, Sensata, Solectron, Tokyo Electron, Universal Display and Viasystems, among others.

Tom received his BA, MA and MEng degrees (First Class) in Engineering from Cambridge University and received his MBA degree from Kellogg School of Management.

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Evercore Inc., formerly known as Evercore Partners, is a global independent investment banking advisory firm founded in 1995 by Roger Altman, David Offensend, and Austin Beutner. Evercore’s Investment Banking business advises its clients on mergers and acquisitions, divestitures, restructurings, financings, public offerings, private placements and other strategic transactions and also provides institutional investors with macro and fundamental equity research, sales and trading execution. Evercore’s Investment Management business comprises wealth management, institutional asset management and private equity investing. Evercore serves clients from 28 offices in North America, Europe, South America and Asia. Since 1995, the firm has advised on more than $3 trillion of merger, acquisition, recapitalization, and restructuring transactions.

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Kunal Chakrabarti

Managing Director


Mr. Chakrabarti is a Managing Director in the firm’s corporate advisory business focusing on the Technology sector.

Mr. Chakrabarti has advised leading technology firms and financial sponsors on M&A and capital markets transactions including Mobileye on its $961M IPO, NxEdge on its $850M sale to Enpro, AvePoint on combination with Apex Technology and subsequent public listing, Conservice on sale of TA Associates’ equity stake to Advent International, Conservice on its sale of majority stake to TA Associates, Enersys on the $750M acquisition of Alpha Technologies Group of Companies, Akamai on its defense and cooperation agreement with Elliott Management, Cobham on its $455M divestiture of AvComm and Wireless businesses to Viavi, Samsung on the $9B acquisition of Harman, Qualcomm on the $49B announced (and subsequently cancelled) acquisition of NXP Semiconductors, Sonus on a merger of equals with Genband, Siris Capital’s $943M acquisition of PGi, Cbeyond on its $323M sale to Birch, and financing of TPG led group’s acquisition of Cirque du Soleil.

Prior to Evercore, Mr. Chakrabarti was an Associate Director at UBS in their Technology, Media and Telecommunications Group in New York. He holds a MBA from Cornell University’s SC Johnson Graduate School of Management and a BA in Economics from University of Delhi, India.

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Evercore Inc., formerly known as Evercore Partners, is a global independent investment banking advisory firm founded in 1995 by Roger Altman, David Offensend, and Austin Beutner. Evercore’s Investment Banking business advises its clients on mergers and acquisitions, divestitures, restructurings, financings, public offerings, private placements and other strategic transactions and also provides institutional investors with macro and fundamental equity research, sales and trading execution. Evercore’s Investment Management business comprises wealth management, institutional asset management and private equity investing. Evercore serves clients from 28 offices in North America, Europe, South America and Asia. Since 1995, the firm has advised on more than $3 trillion of merger, acquisition, recapitalization, and restructuring transactions.

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  • 11:00 – 11:20

Building the Metaverse: Augmented Reality applications and integrated circuits challenges

Augmented reality is a set of technologies that will fundamentally change the way we interact with our environment. It represents a merging of the physical and the digital worlds into a rich, context aware and accessible user interface delivered through a socially acceptable form factor such as eyeglasses. One of the biggest challenges in realizing a comprehensive AR experience are the performance and form factor requiring new custom silicon. Innovations are mandatory to manage power consumption constraints and ensure both adequate battery life and a physically comfortable thermal envelope. This presentation reviews Augmented Reality and Virtual Reality applications and Silicon challenges.

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Edith Beigné

Silicon Research Director at Reality Labs


Edith Beigné is the Research Director of AR/VR Silicon at Meta Reality Labs where she leads silicon research projects driving the future of AR devices. Her main research interests are low power digital and mixed-signal circuits and design with emerging technologies. Over the past 20 years, she has been focusing her research on low power and adaptive circuit techniques, exploiting new design techniques and advanced technology nodes for different applications ranging from high performance multi-processors to ultra-low power SoC, and, more recently, AR/VR applications. She was the technical chair of ISSCC 2022 and part of ISSCC TPC since 2014, she was part of VLSI symposium TPC between 2015 and 2020. Distinguished Lecturer for the SSCS in 2016/2017, Women-in-Circuits Committee chair and JSSC Associate Editor in 2018. She visited Stanford University in 2018 to research on emerging technologies and new architectures.

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Meta builds technologies that help people connect, find communities, and grow businesses. When Facebook launched in 2004, it changed the way people connect. Apps like Messenger, Instagram and WhatsApp further empowered billions around the world. Now, Meta is moving beyond 2D screens toward immersive experiences like augmented and virtual reality to help build the next evolution in social technology.

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  • 11:20 – 11:40

The New Packaging Math: 2x + 4y = 1

PPTs in ISES Docs >
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Wolfgang Sauter

Customer Solutions Architect, Packaging

Marvell Technology

Wolfgang is a Distinguished Engineer in Marvell’s ASIC Business Unit. He works on advanced package solutions and chip interface definition for all ASIC products that require integration of multiple active components.

Before he started at Marvell Semiconductor, Wolfgang worked as a Packaging Engineer at IBM, and as a Customer Product Solutions Architect at Globalfoundries and at Avera Semi.

Wolfgang has authored more than 30 industry papers and publications, and holds more than 130 patents.

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We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you.

Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.

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  • 11:40 – 12:05

Optical I/O Technology to Meet Future Demands of AI

As AI model sizes continue to grow, models will have 100 trillion or more connections, exceeding the technical capabilities of existing AI platforms. New optical interconnect solutions that enable novel system architectures are needed to address the scale, performance and power demands of the next generation of AI. The latest advancements in optical I/O, a new generation of chiplet and multi-wavelength laser solutions, provide dramatically increased bandwidth, at lower latency, over longer distances and at a fraction of the power of existing electrical I/O solutions. In this talk, we present the convergence of trends in compute applications, new optical and advanced packaging technologies, and a scalable supply chain ecosystem, leading to opportunities to build paradigm shifting system architectures addressing AI/ML and cloud computing applications.

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Mark Wade


Ayar Labs

Mark is Chief Executive Officer and Co-Founder of Ayar Labs. His prior roles at Ayar Labs include Chief Technology Officer and Senior Vice President of Engineering. He is recognized as a pioneer in photonics technologies and, prior to founding the company, led the team that designed the optics in the world’s first processor to communicate using light. He and his co-founders invented breakthrough technology at MIT and UC Berkeley from 2010-2015 which led to the formation of Ayar Labs. He holds a PhD from University of Colorado.

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Ayar Labs is disrupting the traditional performance, cost, and efficiency curves of the semiconductor and computing industries by driving a 1000x improvement in interconnect bandwidth density at 10x lower power. Ayar Labs’ patented approach uses industry standard cost-effective silicon processing techniques to develop high speed, high density, low power optical based interconnect “chiplets” and lasers to replace traditional electrical based I/O. The company was founded in 2015 and is funded by a number of domestic and international venture capital firms as well as strategic investors. For more information, visit www.ayarlabs.com.

Address: 695 River Oaks Parkway, San Jose, CA 95134
Phone: 650-963-7200
Email: info@ayarlabs.com

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  • 12:05 – 12:30

Mix and Matching Chiplets with the Economics of PCB Design

Industry has been looking for ways to implement high-performance system in package (SiP) solutions by mixing and matching existing off-the-shelf chiplets. However, due to lack of a universal standard for chiplet interfaces, and connections, this has not yet been practical and achievable. In addition, people have often depended on complex and expensive advanced packaging structures (e.g., large silicon interposers) to build their large SiPs. A new chiplet PHY technology that provides high performance (high bandwidth/power efficiency and low latency) over standard organic package substrates is presented. In addition, an innovative interfacing product that converts any chiplet interface to the new PHY enables practical mix and match of chiplets with different die-to-die interfaces and in different processes. The combined solution not only enables mixing and matching of chiplets, but also provides such option over standard packaging, reducing the total cost of the solution.

Watch on ISES TV > PPTs in ISES Docs >
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Ramin Farjadrad

Co-Founder & CEO


Ramin Farjadrad, president and co-founder of Eliyan Corporation. Ramin, a previous speaker at ISES, is the founding CEO of Eliyan, a start-up focused on addressing interconnect challenges in multi-die architectures. He is the inventor of over 140 granted and pending patents in communications and networking and has a successful track record of creating differentiating connectivity technologies adopted by the industry as international standards (including two Ethernet standards at IEEE, and the BoW chiplet connectivity adopted by OCP.) Prior to Eliyan, Ramin co-founded Velio Communications, which led to a Rambus/LSI Logic acquisition, and Aquantia, which IPO’d and was acquired by Marvell Technologies. Ramin has a Ph.D. EE from Stanford.

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Eliyan Corporation, credited for the invention of the semiconductor industry’s highest-performance and most efficient interconnect on multi-die architectures, is leading the chiplet revolution by enabling the creation of ultimate chiplet systems. Its technology addresses the fundamental challenges with semiconductor scaling to meet the needs of high-performance computing applications, from desktop to datacenter. It has developed a breakthrough method to enable the industry’s highest performing interconnect for homogenous and heterogenous multi-die architectures, enabling increased sustainability through reduction in costs, manufacturing waste and power consumption. The company’s Bunch of Wires (BoW) PHY, invented by founder Ramin Farjadrad and proven to increase performance by 2x and reduce power in half, provides a more efficient approach to developing chiplet-based architectures. The company has received initial funding from strategic investors, including Intel Capital and Micron Ventures, and venture capital firms Tracker Capital Management and Celesta Capital. It is based in Santa Clara, California.

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  • 12:30 – 13:45

Buffet Lunch

  • 13:45 – 14:15

Supply Chain Panel – Sponsored by Airspace

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Rebeca Obregon-Jimenez

SVP Strategic Business Engagements and Supplier Management


Rebeca Obregon-Jimenez is Avnet’s senior vice president of strategic business engagements and supplier management. She creates strong, long-lasting relationships for the Avnet Integrated, Avnet United and Avnet Velocity business units. She also oversees supplier management for the Interconnect, Passive & Electromechanical (IP&E) business and drives strategy, mergers and acquisitions across the organization.

With more than 30 years of experience in the semiconductor industry, Obregon-Jimenez has built and grown teams and businesses from inception to profitable worldwide market leaders. Before joining Avnet, she served as a corporate vice president at Amkor Technology. She also held a variety of strategy, management, operations and engineering roles at IDT and Motorola.

Obregon-Jimenez earned a bachelor’s degree in electrical engineering from Arizona State University and a master’s degree in electrical engineering from the National Technological University. She serves on the board of directors of FormFactor, Inc., a provider of essential test and measurement technology for integrated circuits.

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Avnet (Nasdaq: AVT) is a leading global technology distributor and solutions provider that has served customers’ evolving needs for more than a century. Avnet’s position at the center of the technology value chain enables it to accelerate the design and supply stages of product development so customers can realize revenue faster. Headquartered in Phoenix, Arizona, Avnet serves more than 1 million customers in more than 140 countries and partners with global suppliers from almost every technology segment. At the close of FY22, Avnet generated $24.3 billion in sales and operated 12 major distribution centers, 11 technology campuses, six programming centers, and 250+ facilities in 45+ countries. Learn more about Avnet at www.avnet.com

(480) 643-2000


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Jackie Sturm

CVP Global Supply Chain Operations

Intel Corporation

Jackie Sturm leads operations for Intel’s multi-billion-dollar Global Supply Chain, which has been cited as a #8 or better for nine consecutive years in Gartner’s Supply Chain Top 25. Her international team supports Construction and Facilities sourcing, Indirect procurement, business continuity, supply chain systems and analytics, and Supply Chain Environmental and Social Governance program, which includes Intel’s first-mover Conflict Minerals initiative. Jackie is a committed advocate for the criticality of value-added manufacturing, engineering and trade as the economic foundations of thriving societies. Within Global Supply Chain, Jackie sponsors targeted advancement programs to address challenges faced by women and unrepresented minorities in technology.

Jackie is a board director for KM Labs and on the board of advisors for Banff International Research Station, Gartner/SCM Word, Howard University Center for Supply Chain Management, and Women’s Business Enterprise National Council (WBENC). Prior to joining supply chain, Jackie held various finance positions at Intel, including CFO for Technology and Manufacturing, as well as at Hewlett Packard, Ridge Computer, and Apple.

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Intel (Nasdaq: INTC) is an industry leader, creating world-changing technology that enables global progress and enriches lives. Inspired by Moore’s Law, we continuously work to advance the design and manufacturing of semiconductors to help address our customers’ greatest challenges. By embedding intelligence in the cloud, network, edge and every kind of computing device, we unleash the potential of data to transform business and society for the better.

To learn more about Intel’s innovations, go to newsroom.intel.com and intel.com.

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Nana Tseng

Chief Procurement Officer


Nana Tseng is Chief Procurement Officer of onsemi, a leading semiconductor company rooted in the combined heritage of Motorola and Fairchild. Today, onsemi is driven to innovate intelligent power and sensing solutions focusing in automotive and industrial markets. In her role, she is directly responsible for the procurement and supply partnership strategy, manage multibillion dollar spend ranging from capital equipment, wafer start materials, wafer fab and back end direct and indirect materials, external manufacturing services and corporate services. Prior to joining onsemi, she was the Vice President of Sales at Advanced Semiconductor Engineering (ASE), the world’s largest provider of independent manufacturing services in assembly and test. Her insights on the semiconductor ecosystem and supply chain are built upon her experience working with a broad portfolio of fabless, IDMs, OEMs and EMS companies. Her passion in this industry comes from working with innovative companies committed to bring the next revolutionary technology to the market. Nana was born in Taiwan, grew up in Saudi Arabia, educated in the US, and worked extensively in SE Asia before settling back to Silicon Valley. She has an MBA from MIT Sloan School of Management, and an undergraduate degree from UC Berkeley. In her spare time, she is also very active in her community. She is currently the Vice Chair of Monte Jade West Science and Technology Association, a nonprofit organization focusing to provide mentorship, investment and technology opportunities within the Asian American community and across the Pacific.

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onsemi (Nasdaq: ON) is driving disruptive innovations to help build a better future. With a focus on automotive and industrial end-markets, the company is accelerating change in megatrends such as vehicle electrification and safety, sustainable energy grids, industrial automation, and 5G and cloud infrastructure. With a highly differentiated and innovative product portfolio, onsemi creates intelligent power and sensing technologies that solve the world’s most complex challenges and leads the way in creating a safer, cleaner, and smarter world.

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Ryan Rusnak

Co-Founder & CTO


Ryan Rusnak is a software engineer with a master’s degree in Human Computer Interaction from Carnegie Mellon University. Before co-founding Airspace, Ryan wrote software solutions for the Federal Government. Throughout his career, he has built robots and other projects that have been featured in Popular Science, the Discovery Channel, NBC, BBC, WIRED, Gizmodo, and other media outlets. Ryan teamed up with Nick in 2016 to create Airspace in order to solve the two main inefficiencies in critical logistics: transparency and speed.

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Whether your production line is facing a shutdown, or your high-value equipment is waiting for a new component, you can’t afford a shipping delay. From life-saving organs to essential machinery components, Airspace is trusted by the world’s largest companies and most critical organizations to move their top time-sensitive shipments on time, every time.

Airspace’s proprietary AI-powered platform is the most advanced of its kind- awarded and protected by multiple patents, it provides speed, reliability, routing, tracking visibility and transparency unrivaled in time-critical logistics. It powers a 24/7/365 pro-active expert support team that understands the needs of vertical specific shipments such as those in the semiconductor business.

With offices in the United States in Southern California, Dallas, and in Europe in Amsterdam and new offices in Frankfurt, Stockholm, and Paris, London, Porto, Airspace is rapidly scaling into new markets and industries while continuing to innovate and maximize value for its customers. Backed by leading investors including Telstra, HarbourVest, Prologis, Qualcomm, Defy, and others, Airspace has raised $70M to date.

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  • 14:15 – 14:25

Are New CS Markets Pushing Reliability Culture Shift?

Conditions are changing rapidly in today’s semiconductor manufacturing market. A convergence of emerging applications — primarily 5G, IoT, AI, and AVT— has bolstered the electronics industry. While this boom is good news for the semiconductor manufacturer, the variety of applications place pressure on companies to meet multiple benchmark reliability guidelines. Manufacturers must validate reliability performance to standards of each industry. Add to this the fact that the semiconductor market has an established history of strict reliability standards already entrenched in the markets, and companies face a seemingly impossible uphill climb to qualify their technology to meet opportunity windows.

How can the technical team arm sales and marketing with hard data to convince customers that new, un-fielded products will work in the intended environment?

Watch on ISES TV > PPTs in ISES Docs >
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Roland Shaw

President of Accel-RF

STAr Technologies

Mr. Shaw is President of Accel-RF Corporation and has over 40 years’ experience in RF/microwave test system development. He is an acknowledged industry leader in developing compound-semiconductor accelerated life test methodologies, and co-authored the “Gallium-Arsenide (GaAs) MMIC Reliability Assurance Guideline for Space Applications”, released by NASA-JPL in 1996 as the “guidebook” for space qualification of Gallium-Arsenide MMICs.

Mr. Shaw previously held management and technical positions at Lockheed Martin, Texas Instruments, and was Program Manager on several key projects for NASA-JSC. He has an MSEE from Southern Methodist University (SMU) and BSEE from Texas A&M University.

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STAr Technologies, established in year 2000 and headquartered in Hsinchu Taiwan, with more than 800 employees servicing customers worldwide. We provide test technologies including software, instruments, automatic test equipment, burn-in systems, probe cards, and outsourcing test services to meet demanding challenges within the semiconductor industry. Our expertise extends across parametric electrical tests (E-test), wafer-level and package-level reliability (WLR & PLR), mixed signal tests, RF and power ICs burn-in, MEMS probe cards, load boards, test interfaces and sockets.

Accel-RF Instruments and STAr-Edge Technologies, located in California, provides world leading test equipment for performing high voltage-current, and wide temperature capabilities for long-duration reliability testing and burn-in qualification of compound semiconductors, such as Gallium-Nitride (GaN) and Silicon-Carbide (SiC). These test systems have enabled successful technology developments, product launches, and industry adoption of GaN transistors and MCMs into the aerospace, military, and commercial wireless, and power electronics markets, among others.

Sales Contact Information
Phone: +1-408-416-0777
E-mail: Sales-US@STAr-Quest.com
Website: www.STAr-Quest.com

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  • 14:25 – 14:30

Advanced Silicon Wafers for Optimized MEMS and RF Device Performance

Advanced silicon wafers can greatly improve MEMS and RF device performance and precision, and they can also effectively remove some of the burden in the front-end operations.

Bonded Silicon-On-Insulator (SOI) wafers’ high degree of device layer specification flexibility and high thickness uniformity drive for improved MEMS device performance and precision, design freedom and miniaturization. The use of hermetically sealed structures enabled by Cavity SOI (C-SOI®) wafers also enable more streamlined MEMS manufacture and cost-savings.

High resistivity wafers with highly efficient trap-rich layer and optional ultra-flat wafer geometries provide optimized wafer solution even for the most demanding RF filter and device requirements. They enable RF filters to reach superior performance in terms of very low second harmonics and IMD3 levels, low insertion losses and excellent Q values.

Watch on ISES TV > PPTs in ISES Docs >
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Dr. Atte Haapalinna


Okmetic Oy

Dr. Atte Haapalinna is chief technical officer at Okmetic, the leading supplier of advanced silicon wafers. He has published two dozen papers on various applications of advanced silicon substrates, silicon damage characterization and silicon photodetectors. Dr. Haapalinna has been with Okmetic since 1998, holding various positions including senior vice president of products, senior vice president of customer support and senior manager of new business development. He has participated in development of C-SOI® wafers, ultra-low resistivity wafers for power devices and engineered high resistivity wafers for RF filters and devices. Dr. Haapalinna received his Ph.D. at the Helsinki University of Technology (now Aalto University), Finland.

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Okmetic, founded in 1985, is the 7th largest silicon wafer manufacturer in the world and a true pioneer in the field of advanced silicon wafers. Okmetic supplies tailored, high value-added silicon wafers for the manufacture of MEMS, sensor, RF and power devices. Okmetic has worldwide sales organization and headquarters located in Finland, where the majority of its silicon wafers is manufactured. Okmetic’s operations rely on quality and environmental systems in line with the ISO 9001:2015, ISO 14001:2015, and IATF 16949:2016 standards.


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  • 14:30 – 14:35

Advancing the Semiconductor Industry, TOGETHER

Despite slowdown, semiconductor industry continues to be vibrant in addressing next generation technology challenges in logic, memory, specialty devices and advanced packaging. Lam Research, a US based capital equipment leader in this ecosystem, plays key role in advancing the industry. This presentation shares Lam’s initiatives in driving the technology development to enable future semiconductor solutions. As technology advances exponentially, the big question is around how to accelerate semiconductor innovation in an ecosystem that can often be bound by physical limitations, siloed research and development efforts and the time it takes to connect. The answer will be explored in the presentation, of which Lam proposes a new concept to bring that ecosystem together like never before : through Semiverse.

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Andrew Goh

CVP & GM, Advanced Packaging Customer Operations

Lam Research Corporation

Andrew is currently the Corporate Vice President and General Manager of Lam Research Southeast Asia. Since September 2018, Andrew expanded his role and leads the world-wide Advanced Packaging Customer Operations (APCO) organization. The APCO organization at Lam Research provides best-in-class technology and productivity solutions for existing and emerging advanced packaging applications.

Andrew has over 26 years of experience in the semiconductor industry and prior to Lam Research, Andrew headed the Novellus Systems SE-Asia operations as the Country Manager from 2005 to 2012.

Andrew received a bachelor’s degree in Electronic and Electrical Engineering from the University of Sheffield U.K. and has attended AIEP – Executive Program (INSEAD). Andrew also serves as the Vice Chairman of SEMI Regional Advisory Board.

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Lam Research Corporation is a trusted global supplier of innovative wafer fabrication equipment and services to the semiconductor industry. Our strong values-based culture fuels our progress, and it’s through collaboration, precision, and delivery that we are driving semiconductor breakthroughs that define the next generation. Lam Research (Nasdaq: LRCX) is a FORTUNE 500® company headquartered in Fremont, California, with operations around the globe. Learn more at www.lamresearch.com

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  • 14:35 – 14:40

The future of Advanced Packaging Inspection is X-ray

The global demand for high-end computing power driven by smartphones, IoT applications, High-performance computing, and new mobility applications is constantly rising while facing miniaturization demands. The semiconductor industry is all about identifying and solving these challenges and thereby, yield and process control is core for foundries and its importance increased even more through the introduction of advanced packaging. In today’s environment, two things can be observed. One, prototyping and verification costs exponentially increase while node sizes decrease. Two, a change from typical inspection methods like optical or FIB-SEM to advanced non-destructive inspection techniques like X-ray inspection. Ultimately advanced packaging companies seek non-destructive automated inspection tools which are fast enough to provide value within their production processes, increase yield and reduce waste at an early stage. This presentation will give an overview on how X-Ray and CT inspection can provide value-added data and information for exactly that.

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Enrico Härtel

Director Global Key Account Management


Enrico Haertel is the Director of Global Key Account Management at Comet YXLON. Focusing on x-ray inspection tasks, he is working with customers on solutions to reduce time-to-market and increase yield.

He began his career in the FinTech industry, introducing, among others, contactless payment technology into the European market. Then, switching gears in 2011, he joined the field of inspection solutions for the Semiconductor and SMT world, gaining expertise in testing solutions like wafer probe cards and optical and x-ray inspection.


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Building on decades of experience and an unfailing passion for technology, Comet Yxlon is a globally leading company for industrial X-ray and CT system solutions. Manufacturers in the aerospace, automotive, electronics, and semiconductor industries rely on Comet Yxlon to maximize their product quality and the efficiency of their production. From cutting-edge inspection systems to the award-winning user interface Geminy – at Comet Yxlon, we support our customers with innovative products and services that help them shape future markets.

From single die traditional packages to wafers and advanced packaging devices – we supply manufacturers with X-ray inspection systems that meet the high standards of semiconductor quality control. Speed, resolution, 2D or 3D – depending on the application, manufacturers have different priorities for the inspection of semiconductor products. We offer a variety micro- and nano-focus inspection systems providing digital radioscopy, computed laminography, and computed tomography for optimum test results for increased yield.

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  • 14:40 – 15:40

Networking Break and Business Meetings 7

  • 15:40 – 16:10

Fab Optimization Panel – Sponsored & Moderated by Deloitte

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Dr. Bobby Mitra

Managing Director


Dr. Bobby Mitra is currently Managing Director at Deloitte Consulting, and Consulting leader for Global Semiconductor & Hi-Tech Manufacturing, Supply-Chain and Engineering Practice. Prior to his current role, he was at Texas Instruments as the Worldwide Director of Smart Manufacturing across TI’s 300mm & 200mm wafer fabs and assembly/test sites. In this role, he led several activities around manufacturing automation, multi-year factory-of-the-future roadmap, quality/yield improvement, asset utilization, cycle time optimization, manufacturing productivity etc.

Prior to that, he led TI’s worldwide Industrial Systems across 14 sectors, including factory automation, motor control, smart grid, building automation, test & measurement, medical, appliances etc. He had also led all of Texas Instruments’ operations in India as President & Managing Director, leading all R&D, Sales, Marketing, Research etc.

Dr. Mitra was elected IEEE Fellow, and is Chairman of SEMI Global & Americas Smart Manufacturing. He holds a B.Tech degree in Electronics & Electrical Communications Engineering, and Ph.D in Computer Science & Engineering, both from Indian Institute of Technology (IIT), and an Executive MBA from University of Texas at Austin.

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Deloitte provides industry-leading audit, consulting, tax and advisory services to many of the world’s most admired brands, including nearly 90 percent of the Fortune 500® and more than 7,000 private companies. Our people come together for the greater good and work across the industry sectors that drive and shape today’s marketplace delivering measurable and lasting results that help reinforce public trust in our capital markets, inspire clients to see challenges as opportunities to transform and thrive, and help lead the way toward a stronger economy and a healthier society. Deloitte is proud to be part of the largest global professional services network serving our clients in the markets that are most important to them. Building on more than 175 years of service, our network of member firms spans more than 150 countries and territories. Learn how Deloitte’s more than 330,000 people worldwide connect for impact at www.deloitte.com.

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Juan Velasquez

Senior Director of Global Industrial Engineering and Automation

Skyworks Solutions

Juan is Sr Director of Global Industrial and Systems Engineering for Skyworks Solutions. He has 20 years of U.S. and international experience in semiconductor multi-site manufacturing. His experience ranges from strategic planning to data analytics that drive programs across different functional groups, business units and international sites. Recent initiatives include capacity planning for new technology introduction and the digital transformation of wafer manufacturing sites. He has a MS in Industrial and Operations Engineering from the University of Michigan and a BSEE from the University of California, Irvine.

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Skyworks Solutions, Inc. is empowering the wireless networking revolution. Our highly innovative analog semiconductors are connecting people, places and things spanning a number of new and previously unimagined applications within the automotive, broadband, cellular infrastructure, connected home, industrial, medical, military, smartphone, tablet and wearable markets.

Skyworks is a global company with engineering, marketing, operations, sales and support facilities located throughout Asia, Europe and North America.

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Maitreyee Mahajani

VP Fab Operations

Western Digital

Maitreyee Mahajani is Vice President of Fab Operations at Western Digital and manages the Western Digital-Kioxia (previously Sandisk-Toshiba) JV Fabs and is also responsible for managing the NAND supply strategy for Western Digital.

Prior to joining Western Digital, Maitreyee worked at Applied Materials in various technical leadership positions. She has extensive experience developing semiconductor processing equipment which includes the very first 300mm CVD W deposition system, High K/Metal Gate systems and new ALD platforms to name a few.

As Process and Device Integration Engineer at Matrix Semiconductors (Acquired by SanDisk), Maitreyee developed many innovative ideas for building 3D Memory Devices.

Maitreyee holds a Bachelor of Engineering degree from the College of Engineering in Pune, India and a Master’s degree in Material Science from University of Alabama, Tuscaloosa. She holds over 40 patents and is a recipient of YWCA TWIN award (Tribute to Women in Industry). She is on the council for Global Semiconductor Alliance (GSA) Women Leadership Initiative and actively participates in promoting women in engineering at Western Digital and through GSA.

She is based at the company’s San Jose, CA headquarters location.

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Western Digital Corporation is an American data storage company renowned for its innovative solutions. With a wide range of products including hard drives, solid-state drives, and data center solutions, Western Digital prioritizes data security and protection, consistently pushing the boundaries of storage technology to meet evolving customer needs.

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José J. García, Ph.D.

Managing Director

Analog Devices

José J. García, Ph.D. is the Managing Director of Wafer Fab Sustainability and Autonomous Enterprise at Analog Devices. He received a B.S. Chemical Engineeering degree from the California Institute of Technology (Caltech) and a Ph.D. Chemical Engineering degree from Cornell University. Upon completion of his Ph.D., José joined Intel’s Portland Technology Development organization to develop Lithographic processes for 6 technologies down to the 32nm node. In 2009, José joined Maxim Integrated to help transform its Beaverton semiconductor facility (fab) to best-in-class safety, quality, output and cost levels thru various process, equipment and procurement directorship positions. Upon Analog Devices’ acquisition of Maxim Integrated in 2021, José secured critical items such as Silicon and Capital Equipment to enable a doubling of output in ADI’s internal fab network with minimal clean room expansion. José is now leading the Manufacturing 4.0 and Net Zero Manufacturing Enablement of ADI’s internal factory network.

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Analog Devices, Inc. (NASDAQ: ADI) is a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. ADI combines analog, digital, and software technologies into solutions that help drive advancements in digitized factories, mobility, and digital healthcare, combat climate change, and reliably connect humans and the world. With reported revenues of more than $12 billion in FY22 and more than 24,000 people globally working alongside 125,000 global customers, ADI ensures today’s innovators stay Ahead of What’s Possible. Learn more at www.analog.com and on LinkedIn and Twitter.

Analog Devices
Corporate Headquarters
One Analog Way
Wilmington, MA 01887

Phone: (781) 935-5565 / 1-800-262-5643

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  • 16:10 – 16:40

Geopolitical Landscape and the Semiconductor Industry Impact Closing Panel Discussion

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Salah Nasri

Senior Advisor to President


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International Semiconductor Executive Summits (ISES) holds a significant position within the semiconductor industry. Since 2010 we have scaled 8 major successful regional events globally. Our initiatives to date have been fully supported by local governments. For e.g., ISES USA is hosted in partnership with the Greater Phoenix Economic Council, ISES Taiwan is hosted in partnership with ITRI, ISES EU is hosted in partnership with the EU Commission, ISES Southeast Asia in partnership with Invest in Penang. We serve as a platform where senior executives in technology, manufacturing and R&D from various semiconductor companies, technology providers, and related industries gather to exchange information, shape strategies, and discuss the industry’s direction. Our summits have influenced industry trends and decisions due to the high-level discussions that take place.

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Matthew Fulco

Business & Political Journalist

The Economist Intelligence Unit

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Prof. Rao Tummala

Founding Director and Emeritus Professor

Georgia Institute of Technology

Prof. Rao Tummala is a Distinguished and Endowed Chair Professor and Director Emeritus at Georgia Tech in USA. He is well known as an industrial technologist, technology pioneer, and educator. Prior to joining Georgia Tech in 1993, he was an IBM Fellow and Director of Advanced Packaging Lab(APTL), pioneering such major technologies as the industry’s first plasma display in the 1970’s and the first and next two generations of 100-chip MCM package integration, now called chiplet MCMs, in 1980″s for servers, mainframes, and supercomputers. He is the father of System-on-Package(SOP) concept Vs. System-on-chip (SOC.) As an educator, Prof. Tummala was instrumental in setting up the largest and most comprehensive Academic Center funded by NSF as the 1st and only NSF Engineering Research Center in Electronic Systems Packaging at Georgia Tech. Such a Center, under his leadership, pioneered an integrated approach to research, education, and global industry collaborations. It involved about 30 academic and full-time research faculty,200 Ph.D. and MS students and 50-70 industry and academic collaborators from US, Europe, Japan, Korea, India and Taiwan.. It educated thousands of engineers in packaging in classrooms and labs.,and produced more than 1000 engineers with Ph.D., MS and BS degrees,. He has published about 800 technical papers and invented technologies that resulted in over 110 patents and inventions. He has been pioneering glass-based electronics as the most leading-edge packaging technology beyond Silicon interposers that is targeted to go into production In 2023.

He wrote the first modern handbook in packaging, Microelectronics Packaging Handbook( McGraw-Hill,1988); then 1st undergrad textbook, Fundamentals of Microsystem Packaging(2001); the 1st book introducing the concept of SOP, Intro