Yield Engineering Systems (YES)
ISES Member
Company Profile
For over 40 years, Yield Engineering Systems, (YES), has been at the leading edge of material modification and surface enhancement solutions. Starting as a small, R&D-focused company making lab tools, YES has transformed itself into a trusted manufacturer of reliable and high-volume manufacturing equipment. Our systems and technical solutions are the preferred choice of some of the world’s most innovative companies. Headquartered in Fremont, California, with a growing global presence, YES is positioned for unprecedented growth.
To create the next wave of technological advances, our customers must transform the materials and surfaces they use by implementing clean, coat and cure process steps. These transformations not only make new products possible, but also improve manufacturability – allowing engineering breakthroughs to become production realities. YES is committed to developing innovative materials and surface technology solutions that add the greatest value to our customers’ manufacturing processes by lowering cost, increasing yield, and maximizing reliability.
Product & Services
Yield Engineering Systems, (YES), manufactures precision cleaning, coating, curing, and wet process equipment for innovative leaders in the life sciences, emerging technologies, and advanced semiconductor packaging.
YES-VertaCure XP G2 is a production-proven automated vacuum cure system, equipped with 5-zone uniform temperature control and laminar gas flow. This system provides excellent film performance, much higher throughput and lower CoO than atmospheric curing.
The semiconductor industry is ramping up the development of panel-level packaging (PLP). As Heterogeneous Integration becomes mainstream, PLP can also pave a path for larger size, multi-die, chiplet-based solutions for applications such as AI and HPC. YES offers tools to create Through Glass Vias for PLP.
YES’s Fluxless Formic Acid Reflow System, VeroTherm™ FAR offers:
Industry’s best reflow performance extendable to sub-55µm (down to 12µm) bump pitch, multi-substrate, die stacks
Low vacuum technology enables wicking-free reflow for high aspect ratio bumps across wafer and die locations
Designed to minimize formic acid usage per wafer