US PSES 2022 Speaker
Luca Fanelli received his M.S. degree in Electrical Engineering from the Polytechnic of Turin (Italy) in January of 2006. He joins SPEA the same month and immediately becomes part of the Product and Test Engineering Group involved with Wafer and Final test of Silicon discrete high power MOSFETs. In November 2007 he was appointed Test Engineering Manager of the same group. In this position, he joins the company’s engineering efforts to develop the next generation of High Volume ATEs for the test of GaN products (for Static and Dynamic tests). In 2009 he relocated to the United States, where he manages the entire Semiconductor Engineering Team. While maintaining his Engineering Management role, in December 2012 he was appointed Technical Sales Manager for the North America Sales Team. During this period, he worked closely with the Sales team to affirm and expand the presence of SPEA’s products in North America. In March 2017 he was appointed as Manager of the entire Semiconductor Division in North America, including Sales, Engineering and Service. In the last three years, his group has worked directly with SPEA’s customers to develop state-of-the-art technology for testing high volume discrete SiC high power devices, SiC KGD devices, and SiC Power Modules.
Testing Challenges for Latest SiC and GaN Devices
The growing demand for consumer products combined with the need to reduce carbon fuelled emissions has driven the demand for devices that promote a highly efficient use of power, like SiC and GaN technologies. These two technologies are experiencing tremendous growth at this moment, but at the same time, they pose unique challenges on the manufacturing cycle in general and on the testing process in particular. Among these challenges, we see the increase of switching frequencies combined with the adoption of higher voltages and currents: Automatic Test Equipment must be capable of performing ISO, DC and AC Test along the manufacturing process, from Wafer level test all the way to the final product test. A second testing challenge is related to the design of a signal path with minimal stray inductance. This is critical to minimize voltage overshoots during commutation. A third critical challenge is to ensure high voltage testing for SiC KGD devices. The absence of a molded package around the Silicon, combined with the increasingly high breakdown voltage of these products, requires a careful design of the contact elements in order to avoid arching which could prevent the devices from reaching the desired testing voltage. These, and many other technological challenges, have been faced and solved by SPEA over the last 45 years, and the DOT800 T test platform represents the state-of-the-art equipment that has made SPEA a global leader in testing power products.
Established in 1976, SPEA is a world leading company in the field of automatic test equipment for ICs, MEMS, sensors, electronic boards.SPEA serves the big semiconductor IDMs and OSATs with the most cost-effective and high-performance equipment to test automotive, SoCs, analog mixed-signal devices, MEMS sensors and actuators, power and discretes, identification devices, delivering highest measurement capabilities, lowest cost of test and fastest time-to-market.SPEA systems are designed to detect any possible defect in electronic products, so that they won’t fail on the field. High throughput, best detection capability, test techniques designed on the latest technologies requirements, complete configurability. For SPEA customers, testing is not an additional cost, but a tangible competitive advantage.