Heterogeneous Integration Platform for Next Generation Computing

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Today’s era of smartphones, 5G, AI and big data calls for increasingly faster speeds of computing performance. However, the speed of semiconductor innovation and technology advancement has slowed down, and chip miniaturization has reached physical limits, which has caused the speed at which transistors are growing smaller to slow down. In other words, we are now falling behind Moore’s Law.

Advances in heterogeneous chip packages are need to empower today is the device manufacturers to pursue tomorrow’s breakthrough. Both 2.5D and 3D will be needed to keep innovation vibrant also higher bandwidths and density solution is important for HPC and AI systems. So memory coherency and low latency attributes across converged compute infrastructures with interconnect technologies including UCIe.

In this paper, advanced package solutions are to be introduced and discussed in terms of challenges and opportunities for emerging high end computing, memory and mobile platforms.

Dr. Seungwook Yoon photo

Seung Wook Yoon, Ph.D, MBA

CVP Business Development Team, AVP

Samsung Electronics

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