Memory and Processors for Chiplet Designs

ISES Docs:

The rise of generative AI applications and high-performance computing (HPC) in data centers has boosted demand for high-speed memory and computing devices with low-latency interfaces. In this context, heterogeneous integration and chiplet architectures enabled by advanced packaging approaches (e.g., hybrid bonding) are being regarded as the most promising solutions to address the memory-bandwidth bottleneck and increase the performance of computing systems via a tight integration of logic and memory functions.

This talk will provide an overview on the interplay between memory and processors in terms of technology and markets trends, describing the main solutions, the challenges, and the opportunities ahead for semiconductor players.

Simone Bertolazzi, PhD. photo

Simone Bertolazzi, PhD.

Principal Technology & Market Analyst

Yole Intelligence

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