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Advanced Packaging Technologies for Heterogenous Integration: Glass Core Package Substrate

Rahul Manepalli, Ph.D. photo

Rahul Manepalli, Ph.D.

Intel Fellow; Director Substrate TD Module Engineering

Intel Corporation

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Optical I/O Technology for the Future of AI

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Mark Wade

CEO

Ayar Labs

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Assembly Technologies for the Front End

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Chris Scanlan

SVP Technology

Besi

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Co-Packaged Optics and Solutions for High Volume manufacturing

Dr. Johann Weinhändler photo

Dr. Johann Weinhändler

Managing Director

ASMPT Limited

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REALITY Twin vs. Digital Twin: Revolutionizing Industrial Remote Management

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CJ Hsieh

COO

ASPEED

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RISC-V Accelerating ML Innovation and Beyond

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Samuel Chiang

Deputy Technical Director

Andes Technology

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Disruptions in Semiconductor Supply Chain

Michael Mo photo

Michael Mo

Partner and Managing Director

AlixPartners

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Unlocking Values: The Power of AI/ML in Semiconductor Test

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Michael Chang

VP & GM, Advantest Cloud Solutions

Advantest

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Panel Discussion: Bridging Workforce, Research and Business to Meet the Future Needs of the U.S.

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Najwa Khazal

General Manager STC Americas

Edwards

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Why Patents Matter

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Steven Rizzi

Principal

McKool Smith

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Panel Discussion: Supply Chain Continuity and Resiliency

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Jeffrey Wincel

SVP & Chief Procurement Officer

NXP Semiconductors

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A Game-Changer for AI and HPC Substrates: A Novel Interconnect Technology

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Rozalia Beica

Chief Commercial Officer

LQDX

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Panel Discussion: The Future of Silicon Photonics

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Josef Berger

Associate Vice President, Cloud Optics Marketing

Marvell Technology

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Semiconductor Market Outlook: Investment and Innovation Accelerate Next Growth Cycle

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Mario Morales

Group VP, Enabling Technologies and Semiconductors

IDC

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Solutions for Substrates Production

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Laurent Nicolet

VP Business Electronics

SCHMID

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Enabling the Next Generation of Scaling for Advanced Substrates

Naranjan Khasgiwale photo

Niranjan Khasgiwale

VP Digital Lithography Group

Applied Materials

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Advanced Packaging/Substrate Materials and Open innovation Platform

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Hidenori Abe

Electronics R&D Center GM

Resonac Corporation

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Advanced Packaging and Disaggregated Architectures for Automotive

Bassam Ziadeh photo

Bassam Ziadeh

Global Technical Specialist – IC Packaging, Assembly & Test

General Motors

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The Essential Evolution of Packaging in the Systems Foundry Era

Stuart Pann photo

Stuart Pann

SVP & GM

Intel IFS

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Panel Discussion: Marking the Memory Wall a Memory: Prespectives on Technical and Economic Challenges

Dr. Ravi Mahajan photo

Dr. Ravi Mahajan

Intel Fellow, Assembly and Packaging Technology Pathfinding

Intel Corporation

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Glass Substrates for Advanced Packaging

Dr. Xavier Lafosse photo

Dr. Xavier Lafosse

Commercial Technology Director, Advanced Optics

Corning Advanced Optics

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Co-Packaged Optics and Solutions for High Volume manufacturing

Dr. Johann Weinhändler photo

Dr. Johann Weinhändler

Managing Director

ASMPT Limited

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Challenges to enabling the transition from organic to glass core substrates as RDL approaches 2 µm l/s and beyond

Keith Best photo

Keith Best

Director, Product Marketing, Lithography

Onto Innovation

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Test Challenges in the AI & Chiplet era

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Srini Chinamalli

Co Founder & CEO

Tessolve

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Optimizing Cost and Quality Through Test Mobility Across Insertions

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Rick Burns

President Semiconductor Test Division

Teradyne

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Silicon Manufacturing and Packaging at MSFT in the Cloud/AI era

Sriram Srinivasan photo

Sriram Srinivasan

Partner Silicon Packaging Technology

Microsoft

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Optimizing Interconnect Density with New Packaging Technologies

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Oreste Donzella

Executive VP – EPC (Electronics, Packaging, and Component) Group

KLA

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HPC, AI, Chiplets, heterogeneous integration

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Mark Fuselier

SVP Technology & Product Engineering

AMD

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CHIPS National Advanced Packaging Manufacturing Program (NAPMP) Update

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Dan Berger

Associate Director

CHIPS for America R&D Office

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Advanced Packaging: Navigating System Technology Co-optimization & Embracing Innovation

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Dr. Ann Kelleher

EVP & GM Technology Development

Intel Corporation

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Greater Phoenix: Semiconductor Excellence on the Global Stage

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Chris Camacho

President & CEO

Greater Phoenix Economic Council (GPEC)

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Packaging Trends in the Power Semiconductor Market

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Joseph Roybal

Senior Vice President of Global Backend Operations

Wolfspeed

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An OSAT Perspective of the Power Semiconductor Market

Katsumi Furuse photo

Katsumi Furuse

Sr. Manager Wirebond/Power BU Power

Amkor Technology, Inc.

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Semiconductor Innovations Across a More Diversified End Market

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Oreste Donzella

Executive VP – EPC (Electronics, Packaging, and Component) Group

KLA

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Semiconductor Innovation Success: Building on Global Collaboration Amongst Trusted Partners in Nanoelectronics R&D

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Lode Lauwers

Senior Vice President Business Development & Sales

imec

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DRAM challenges and innovations for demanding AI workloads

Shigeru Shiratake photo

Shigeru Shiratake

Corporate Vice President DRAM Process Integration and Device Technology

Micron Technology, Inc.

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