Kangwook Lee photo

Dr. Kangwook Lee

SVP and Head of PKG Development
SK Hynix


Dr. Lee has been one of critical leaders who are leading the era of 3D TSV stack memory such as HBM (High Bandwidth Memory) in semiconductor industry.

He has contributed broadly to, and led teams in, 3D integration/packaging R&D including core technology/product development/reliability study and mass production for HBM over 27 years.

Dr. Lee received the Ph.D. degree in machine intelligence and systems engineering from Tohoku University, Japan, in 2000. During his doctoral research at Tohoku University,

Dr. Lee proposed a new 3D-IC integration technology to achieve 3D devices with high performance and multi-functionality, leading this field in the world.

From 2001 to 2002, he was a Postdoctoral Researcher with the Department of Electrical, Computer, and Systems Engineering, Rensselaer Polytechnic Institute, Troy, NY, USA.

He worked with Memory Division, Samsung Electronics Ltd., Korea, as a Principal Engineer from 2002 to 2008.

From 2008 to 2016, he worked with the New Industry Creation Hatchery Center (NICHe), Tohoku University, Japan, as a Professor.

From 2017 to 2018, he worked with R&D center, Amkor Technology Korea, as a VP.

He joined SK hynix 2018 and currently Senior VP, Head of PKG Development at SK Hynix, Korea.

Dr. Lee has led many interdisciplinary R&D programs on 3D integration, including integration of various materials and devices to achieve 3D devices/systems with high performance and new functionality,

3D-IC reliability research to investigate the impacts of 3D integration on the device performance and reliability, unique hybrid integration of nano-materials with Si, and product development of 3D stack DRAM

such as high-bandwidth memory (HBM). For over 27 years at universities and industries in Japan, US, and Korea, Dr. Lee has made exceptional technical contributions to and lasting impacts on 3D integration technology

and 3D product development in broad fields, such as material science, materials characterization/analysis, semiconductor device/process, electrical packaging, and Si micro-machining.

Dr. Lee has authored more than 230 scientific publications (peered journals, international conferences), co-edited 4 books, and given 43 tutorial/invited/keynote talks in international conferences including

IEEE IEDM, IEEE IRPS, VLSI Symposium, plus 23 US patent publications.

He has served as a frequent reviewer for a number of journals, including IEEE EDL, IEEE T- ED, IEEE CPMT, and technical program committees of international conferences, including IEEE ECTC, IEEE IRPS, IEEE EDTM, IEEE 3D SIC.

He is a Senior Member of IEEE.

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