Yaojian Lin photo

Yaojian Lin

VP, GM of Technology R&D Center
JCET Group Co., Ltd.
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Biography

Mr. Lin, Yaojian holds B.S. degree in Metal Materials & Heat Treatment from Huazhong University of Science and Technology with Honor of Outstanding Graduate, M.S. degree in Composite Materials from Shanghai Jiaotong University, and M.S. degree in Materials Science from University of Rochester, NY, United States. He once worked at Shanghai Jiaotong University, Lucent Bell Labs/Sychip, and STATS ChipPAC (Singapore), and is now VP of Corporate & GM of Technology R&D Center. He has over 20 years R&D and Technology Transfer Experience in Materials and Semiconductor Packaging development, especially in wafer level package and advanced packaging. He has hands-on experiences in end-to-end technology & product development from conceptual to high volume manufacturing in IPD, Wafer Bumping, WLCSP, eWLB/eWLCSP, 2.5D Fan-out & fcBGA, fcCSP and advanced SiP. He is the inventor/co-inventor of 200+ granted US patents in semiconductor packaging.

Company Profile

JCET Group Co., Ltd.

JCET Group is the world’s leading integrated-circuit manufacturing and technology services provider, offering a full range of turnkey services that include semiconductor package integration design and characterization, R&D, wafer probe, wafer bumping, package assembly, final test and drop shipment to vendors around the world.

Our comprehensive portfolio covers a wide spectrum of semiconductor applications such as mobile, communication, compute, consumer, automotive, and industrial, through advanced wafer-level packaging, 2.5D/3D, System-in-Package, and reliable flip chip and wire bonding technologies. JCET Group has two R&D centers in China and Korea, six manufacturing locations in China, Korea, and Singapore, and sales centers around the world, providing close technology collaboration and efficient supply-chain manufacturing to our global customers.

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