• 11:15 – 11:45

Keynote

HPC, AI, Chiplets, heterogeneous integration

Innovations like generative AI have placed unprecedented demand for compute. The availabilityand capability of GPU compute is the single most important driver of AI adoption, and it’sbecoming increasingly clear traditional monolithic processors are all but obsolete. Chipletar chitecture has brought about tremendous change in the industry by rethinking modern chipdesign to meet the insatiable demand for compute. By creating custom, modular chiplets andintegrating heterogeneous architectures on to one package, memory capacity and bandwidthreach levels previously thought unattainable.

Join AMD’s Mark Fuselier as he delves into the design advancements in chiplet architecturenecessary to meet the demand AI places on computing power.

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Mark Fuselier photo

Mark Fuselier

SVP Technology & Product Engineering

AMD

Mark Fuselier is senior vice president of Technology and Product Engineering at AMD.

He is responsible for silicon and packaging technology development and new product introduction engineering.

Fuselier has more than 27 years of semiconductor industry experience and has been involved in the development and production of process technology generations spanning from 35 micron through 3nm across multiple fabs and product families. He played a central role in the development and productization of computing solutions such as multi-core CPU and GPU SoC integration, heterogenous APUs, 2.5D and 3D chip-packaging, and chiplet System in Package (SiP) integration.

Fuselier holds a Master of Science degree in electrical engineering and Master of Business Administration from the University of Texas at Austin. He is a member of IEEE and the Electron Devices Society.

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