Enabling the Future of AI: Innovations in HBM, Advanced Packaging, and Power Semiconductors

09:00 – 09:35

Registration

09:40 – 10:00

Welcome Speech 

Salah Nasri

CEO and Co-Founder

International Semiconductor Industry Group (I.S.I.G.)

Joshua Yoo

President

Core Insight, Inc.

AI-Driven Innovations in Advanced Packaging: HBM & Glass Substrate for Next-Gen Performance

10:00 – 10:20

Keynote

HBM Technology and Challenges

Major semiconductor players accelerate the competition to lead semiconductor industry hegemony by the evolution of advanced packaging technology such as chiplets and 2.5D/3D heterogeneous integration. By the evolution of advanced packaging technologies, SK hynix will continuously lead the competitiveness of memory business and prepare the business innovation for beyond memory era.

Kangwook Lee, Ph.D.

SVP and Head of Packaging Development

SK Hynix

10:20 – 10:40

Keynote

The futrue of Advanced Package for AI application.

As the Moore’s law reach the limitation, Si fabrication process need extremely high cost solutions such as multiple patterning and EUV (Extreme Ultra-Violet) lithography. In spite of high cost Si fabrication process, chip size is increased over the reticle size limit by adding more and more functional blocks for high performance computing. In particular, with the continuous demand for higher performance and capacity in memory products, the amount of data created, processed, stored and transferred is increasing tremendously. In order to overcome these challenges, advanced package has been actively used for heterogeneous integration in electronic packages since the past decade. 2.5D Si interposer architecture has been widely used for horizontal interconnection between logic to logic and logic to high bandwidth memory integration. In this talk, recent advanced package technology and key roadmap in Samsung Electronics will be shared for AI application.

Dae-Woo Kim, Ph.D.

Corporate VP, Head of PKG Development Team

Samsung Electronics

10:45 – 11:45

Networking and Coffee Break 

Business Meeting Slot 3

11:50 – 12:10

Keynote

Co-Packaged Optics: Powering the Next Generation of Data Center Connectivity for the AI Era

The rapid advancements in machine learning—particularly large language models (LLMs)—are driving an exponential increase in compute demands, with requirements growing by roughly an order of magnitude every 18 months. Traditional gains in silicon scaling are no longer sufficient, prompting a shift from general-purpose computing to accelerated computing and massive parallelism. This evolution amplifies the critical role of interconnect bandwidth, now a primary system bottleneck. Co-packaged optics (CPO) offer a transformative path forward, delivering scalable, high-bandwidth, and energy-efficient interconnects for next-generation workloads. Realizing CPO’s full potential will require advances in 2.5D and 3D integration to achieve new levels of performance and efficiency. In this talk, we will examine the state of current CPO solutions and explore the integration and scaling options that can unlock their full promise.

Liron Gantz, Ph.D.

Research Staff Member

NVIDIA

12:10 – 12:30

Keynote

Breaking Barriers with Glass: A New Era in Semiconductor Integration

As semiconductor packaging evolves to meet the demands of AI, high-performance computing, and RF systems, traditional organic and silicon-based substrates are nearing their limits. Glass substrates are emerging as a compelling alternative, offering exceptional electrical performance, dimensional stability, and scalability. With ultra-low dielectric loss, fine-pitch interconnect capability, and compatibility with Through-Glass Vias (TGVs), glass enables higher signal integrity and integration density. Its thermal expansion match with silicon also enhances reliability in advanced packages. Despite challenges—such as mechanical fragility, TGV metallization, and thermal management—ongoing innovations in materials and process engineering are rapidly closing the gap. This keynote explores the transformative potential of glass substrates, the hurdles to their widespread adoption, and the collaborative efforts shaping a new ecosystem for next-generation semiconductor packaging.

Sung Jin Kim, Ph.D.

CTO

Absolics

12:35 – 13:45

Lunch Break

Update on Advanced Packaging Solution

13:50 – 14:10

Advanced Power Packaging for AI Power solution: UTAC’s Thermally Enhanced QFN and 3D Module Solutions for Optimized Efficiency and Integration

Reserved

Michael Choi

VP of Business Development

UTAC Group

14:10 – 14:20

Enabling next-gen AI with ASMPT’s Total Interconnect Solutions

ASMPT Semiconductor Solutions stands at the forefront of the AI revolution, delivering comprehensive advanced packaging technologies essential for next-generation artificial intelligence applications. As AI workloads demand exponential increases in interconnect density and performance, ASMPT Semiconductor Solutions’ total interconnect solutions portfolio addresses critical challenges across CoWoS, HBM, and heterogeneous integration. Our pioneering thermo-compression bonding (TCB) technologies, including the industry-first fluxless AOR™ process, enable the precise sub-micron connections required for AI logic processors and high-bandwidth memory integration. With proven capabilities spanning first-level interconnect solutions for HPC and data center applications such as silicon photonics, co-packaged optics, logic, CoWoS and HBM packaging, ASMPT Semiconductor Solutions empowers the Intelligence Revolution, supporting applications from cloud computing to edge AI deployment across automotive, industrial, and telecommunications sectors.

Choon Khoon Lim

SVP and CEO, Business Group Advanced Packaging

ASMPT Semiconductor Solutions

14:20 – 14:30

Atomic-Scale Manufacturing for Next-Gen Advanced Packaging

Advanced packaging demands ultra-precise material engineering—from hybrid bonding to reliable edge passivation. ATLANT 3D’s patented Direct Atomic Layer Processing (DALP®) technology enables on-demand, localized atomic layer processing of functional materials. Our approach eliminates the need for masks, vacuum chambers, and lithography steps—making it ideal for interface tailoring in advanced packaging. Join us to explore how atomic-scale processing can unlock novel integration schemes, improve device yield, and accelerate lab-to-fab transitions in the era of heterogeneous integration and chiplet architectures.

Maksym Plakhotnyuk, Ph.D.

CEO & Founder

ATLANT 3D

Power Semiconductor Session

14:30 – 14:50

Innovating Power for an Electrified, Intelligent World

As global technology evolves, power semiconductor devices become crucial. onsemi advances in SiC, intelligent power modules, and power management solutions, aligning with market needs for a sustainable future.

B.Y. Park

Sr. Director, Product Division

onsemi

14:50 – 15:10

Advancements in High-Power Module Packaging for Traction Inverters in Electric Vehicles

Power modules are core components of inverters and converters in solar power plants, data center power supplies and in electric vehicles. Their packaging technology has a critical impact on system performance, reliability and lifetime.
Nexperia has introduced the copper clip interconnect technology for robust high-power cascode GaN devices. Further cutting-edge power module concepts have been introduced in recent times with embedded GaN dies that allow operation at much higher frequencies, as well as new cooling methods that are pushing today’s performance limits.

Achim Strass, Ph.D.

Senior Director Technology Scouting and Cooperation

Nexperia

15:15 – 16:15

Networking and Coffee Break 

Business Meeting Slot 4&5  

Powering the Future of AI: Silicon Photonic Session & CPO

16:20 – 16:40

imec SiPh technologies for scaling AI Systems

In this presentation, we highlight the imec business models and technology roadmaps that we bring forward to enable the AI era to continue benefiting from scaling. We will outline the imec vision for deeply integrating optical interconnects into the package, interposer, and wafer level, leveraging scaled Silicon Photonics and 3D technologies to implement high-density sub-pJ/bit optical transceivers. We will share some recent results from our ongoing research and development efforts on advanced optical devices, packaging and assembly.

Maarten Willems

Vice President of Global Business Development

imec

16:40 – 17:00

Photonic Fabric ™ : Designing silicon photonics for reliability, scale and deployment

Celestial AI’s Photonic Fabric is the world’s leading photonic interconnect for scale-up AI and accelerated computing networks. Delivering ultra-high bandwidth, low latency, and exceptional energy efficiency—with in-network memory and compute—Photonic Fabric overcomes the scaling limits of traditional interconnects. In this talk, Ankur Aggarwal will share how Celestial AI engineered the Photonic Fabric for hyperscale data center reliability, manufacturing compatibility with mainstream advanced packaging technologies, and rapid deployment. Attendees will gain insight into the architectural innovations that make Photonic Fabric a must have tool for the next generation of AI infrastructure.

Ankur Aggarwal, Ph.D.

VP of Advanced Packaging & Supply Chain

Celestial AI

17:00 – 17:20

From Electrons to Photons: A Lightmatter Perspective on 3D Photonic Interconnect

Silicon Photonics has become an essential technology to meet the needs of compute demands which are fueling the AI revolution. Lightmatter is a leading co-packaged optics solution provider in this market with a vision of delivering complete vertically-integrated interconnect solutions to the end customers. This talk will focus on Lightmatter’s product and technology portfolio that is enabling unprecedented bandwidth required for leading AI data centers. The talk will highlight some of the key progress made to-date across silicon, package technologies and challenges critical to realizing and scaling these innovations, from novel 3D photonic chip architectures to large scale deployments.

Ritesh Jain

SVP, Engineering & Operations

Lightmatter

17:20 – 17:30

Dry Laser Cleaning Solution

Femtum’s laser cleaning solution offers precise, dry, and selective removal of particles, residues, and films from photonic and semiconductor surfaces. its laser solution targets contaminants—such as epoxy, dust, and grease—without damaging sensitive substrates like Si, SiO₂, or gold. The system integrates vision, software, and high-speed scanning for localized or area-wide cleaning, enabling higher yield, safer processing, and automation-ready deployment in advanced packaging and silicon photonics.

Simon Duval, Ph.D.

CTO & Co-Founder

Femtum

Unlock Strategic Market Insights

17:30 – 17:50

HOW LONG AI WILL FUEL THE SEMICONDUCTOR INDUSTRY?

Generative AI is transforming the data center industry, significantly driving growth in the processor and memory markets. While GPUs have seen massive revenue increases, AI-specific ASICs based are also gaining traction. This shift is prompting a rethinking of infrastructure design to support AI workloads. By 2030, the High Bandwidth Memory (HBM) market is projected to match the DRAM market in size, positioning HBM as the most strategic and profitable memory type. The discussion also explores how the evolving semiconductor supply chain is adapting to and benefiting from this AI-driven expansion across hardware and infrastructure layers.

Emilie Jolivet

Computing, Software & Memory Director

Yole Group

Driving Strategic Innovation: Corporate Investment Briefings – Gyeonggi & Suwon

17:50 – 18:00

Optimizing the Ecosystem for the Semiconductor Industry Gyeonggi Province of Korea

So Jung Yoo

Director, Investment Promotion Division

Gyeonggi Province

18:00 – 18:10

Invest in Your Future – Invest in Suwon! The Powerhouse of Opportunity in the Suwon Free Economic Zone

This presentation showcases why Suwon – and especially the Suwon Free Economic Zone – is one of the most attractive investment destinations, not only in South Korea but also as a strategic hub for Northeast Asia.

With world-class infrastructure, a highly skilled workforce, and an ideal strategic location, Suwon draws leading companies in advanced technology sectors. This session will highlight the city’s key advantages, growth opportunities, and forward-looking plans that position Suwon as a dynamic hub for innovation and economic success – particularly in the semiconductor industry.

Jean Lim

Deputy Director of Investment Promotion Team/Business Attraction Division

SUWON CITY

18:10 – 18:15

Closing Remark

I.S.I.G. 

18:20 – 18:45

Cocktail Reception

18:45 – 19:00

Dinner Check-in

19:00 – 21:00

Gala Dinner and Award Ceremony

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