未来を牽引する:半導体産業における先進的なパッケージング、AIの統合、そして自動車のイノベーション

07:50 – 08:35

Registration and Badge Collection

08:40 – 09:00

歓迎スピーチ

サラ・ナスリ

CEOおよび共同創設者

International Semiconductor Industry Group (I.S.I.G.)

須原忠浩

CEO

TSSC

09:00 – 09:20

開会の挨拶

南部 友成 氏-

ダイレクター ITインダストリ

経済産業省(METI)

高度な革新でAI時代を切り開く: 高度なパッケージング、HBM、そして高度な製造

09:20 – 09:40

基調講演

感情を創り出すイメージング&センシング技術

Will introduce the latest initiatives of process and device technologies that enhance Sony’s image sensors to create “Emotion.”

清水 照士 氏

取締役会長

ソニーセミコンダクタソリューションズ株式会社

09:40 – 10:00

基調講演

コンピューティングの未来 – 半導体向けAIの未来像

AI is accelerating across industries, with computing demands growing 100 million times in just 15 years. This rapid evolution brings remarkable innovations—but also new societal challenges. Computing technologies are essential to solving these issues and powering the next era of AI. Semiconductors are one of key technology area which form the foundation of the future of computing, such as advanced packaging technology for new generation of process node. Join us to discover the latest updates and what’s next in this transformative journey.

森本 典繁 氏

取締役副社長執行役員 最高技術責任者

日本アイ・ビー・エム株式会社

10:05 – 11:05

コミュニケーションワーキング・ビジネスミーティング1・2

11:10 – 11:30

基調講演

Deepak Kulkarni, Ph.D.

シニア・フェロー アドバンスド・パッケージング

AMD

11:30 – 11:50

基調講演

半導体イノベーションの未来を牽引する:AI搭載の先進プロセス技術と日本の飛躍

In this keynote, I will explore how AI-driven innovations such as Raads and DMCO are revolutionizing advanced semiconductor nodes and reshaping the future of chip manufacturing. By integrating intelligent design automation and data-centric optimization, these technologies accelerate development cycles and enhance yield. I will also highlight Japan’s strategic leap in semiconductor leadership, including breakthroughs in advanced packaging and ecosystem collaboration. How AI is unlocking new possibilities in scalability, performance, and sustainability—positioning Japan at the forefront of global semiconductor innovation.

石丸 一成 氏

専務執行役員 シリコン技術本部長

Rapidus株式会社

11:55 – 13:25

昼食

13:30 – 13:50

Imec’s nanoelectronics research platform: Collaborative approach for breakthrough innovations

Our life is increasingly guided and supported by semiconductor devices and systems, enabling smart application areas from high-performance computing to health, automotive, industrial automation and robotics. And the massive breakthrough of AI is accelerating this disruptively.

To sustain the momentum, we must rethink upscaling and performance improvements at device, architecture, and system levels. All these roadmaps will face fundamental bottlenecks, with one overarching issue: the energy equation. From grid to chip, the challenges range from delivery, conversion, consumption, and dissipation.

Worldwide approaches in R&D will be required to tackle these challenges and continue the trend toward more efficient systems and growing prosperity. This talk will address a selection of technology solutions that imec is working on to change the needle in the energy equation and will present the collaborative models we propose to realize these innovations.

Lode Lauwers

Senior Vice President Business Development and Strategy

Imec 大学際微細電子工学中央研究団)

13:50 – 14:10

Shigeru Shirateke 氏
Corporate Vice President DRAM Process Integration and Device Technology
Micron Technology Inc.

14:10 – 14:30

The Future of Advanced Package for AI Application

Advances in heterogeneous chip packages are needed to empower today’s device manufacturers to pursue tomorrow’s breakthroughs. Samsung Advanced Package Platform is to be introduced in terms of technology roadmap, challenges and opportunities for emerging high-end computing, memory and mobile applications.

Takashi Kariya, Ph.D.

Corporate Vice President, Head of Lab.

Samsung Electronics

14:30 – 14:50

メモリ帯域幅こそがすべてである

(Language: Japanese, English interpretation provided) 

As generative AI continues to evolve, the importance of inference computing is poised to grow steadily. In this session, the speaker Takahiro Ogura will introduce the 3D-stacked memory structure, a technological breakthrough for AI inference chips, and demonstrate its potential for social transformation through AI agents and edge AI. Ogura will also share his company Preferred Networks’s vision for democratization of AI and creation of new paradigms through their proprietary chip design, ecosystem development and industry collaborations. 

小倉 崇浩 氏

AIコンピューティング本部 プレジデント

株式会社Preferred Networks

14:55 – 15:55

ネットワーキング・ビジネスミーティング3・4

16:00 – 16:20

レゾナックのオープンイノベーション戦略:共創型化学企業

The cutting-edge semiconductors necessary for the evolution of AI are supported by advances in equipment and material technology. The emergence of chiplet package structures has led to increased complexity in packaging, making collaboration between materials manufacturers and equipment manufacturers more critical than ever.

Resonac, a co-creative chemical company that provides a variety of semiconductor materials such as CMP slurry, etching gas, materials for HBM, epoxy molding compounds, substrate core materials, and more, is advancing materials technology development through open innovation activities. Resonac has started a Packaging Solution Center to propose one-stop solutions for customers and has established the co-creative packaging evaluation platform “JOINT2” with leading companies to accelerate the development of advanced materials, equipment, and substrates for 2.xD and 3D packages. Furthermore, in 2025, the company launched the open innovation initiative “US-JOINT” in Silicon Valley, USA, and launched a new co-creation platform, “JOINT3,” in Japan to accelerate technology development through co-creation. This presentation will introduce Resonac’s co-creation strategies.

阿部 秀則 氏

執行役員 半導体材料研究開発統括

株式会社レゾナック

16:20 – 16:30

Nelson Fan photo

Nelson Fan 氏

APT Business Lead,VP of Business Development APT ASMPT

ASMPT Semiconductor Solutions

16:30 – 16:40

包装技術の進化:シリコンインターポーザー代替としてのガラスコア統合に向けたガラスビアの探求

In contemporary electronic packaging, the pursuit of miniaturization, enhanced performance, and reliability remains a fundamental driving force. This abstract introduces a novel approach in advanced packaging through the utilization of Through Glass Vias (TGVs) for Glass Core Integration, as a viable alternative to Conventional Silicon (Si) Interposer technology. The presentation encapsulates the background, motivations, technical aspects, and results of our evaluation work in this innovative packaging paradigm.
The background of this research is grounded in the growing demand for smaller form factors, increased functionality, and improved thermal management in electronic devices. Traditional Si interposer technology, while effective, presents limitations in terms of scalability, thermal conductivity, and electrical performance. Thus, the exploration of alternative materials and methodologies is imperative for the next generation of packaging solutions.
Motivated by the exceptional properties of glass, including its thermal stability, electrical insulation, and compatibility with existing manufacturing processes, this study delves into the feasibility of utilizing glass as both a carrier and core material in advanced packaging. Through Glass Vias (TGVs) emerge as a key enabler, facilitating vertical interconnects within the glass substrate.
Key considerations such as through-hole requirements, aspect ratios, seed layer deposition, and adhesion to glass are meticulously addressed to ensure the integrity and reliability of the packaging structure. Innovative process technologies are developed to fabricate TGVs with precise dimensions, high aspect ratios, and robust electrical properties.
The hardware requirements for implementing TGV-based packaging are evaluated, encompassing equipment for laser drilling, seed layer deposition, plating, and planarization processes. Cost considerations are also examined to ascertain the economic viability of this approach compared to conventional methodologies.
Results from our evaluation work demonstrate promising advancements in TGV-based packaging, including enhanced electrical performance, superior thermal dissipation, and significant miniaturization potential. Through detailed analysis and experimentation, this presentation illuminates the transformative capabilities of Through Glass Vias for Glass Core Integration, heralding a new era in advanced packaging technology.

Herbert Oetzlinger

VP, Panel Product Line Head • Panel Product Management

Lam Research ラムリサーチ合同会社

16:40 – 16:50

古屋 明彦 氏

執行役員  エレクトロニクス事業本部 半導体事業部長

TOPPAN株式会社

市場洞察

16:50 – 17:10

AI-driven Advanced Packaging – trends, market view and a Japanese perspective

Datacenter AI workloads are rewriting packaging rules. Bandwidth per millimeter, thermal density, and module yield now define system performance.

This presentation examines genAI’s impact on the semiconductor industry with a focus on advanced packaging, from 2.5D (HBM) to emerging 3D (logic–memory stacking), hybrid bonding, glass-core, etc.

Participants will learn about the latest market forecasts for devices/packages driving the growth in this category, as well as application/technology trends. Beyond global industry players, we will highlight Japan’s strengths in chemicals, packaging materials, substrates and equipment that anchor CoWoS-class platforms and next-generation 3D assemblies.

Dimitrios Damianos 氏

Senior Manager Consulting

Yole Group

17:10 – 17:30

Akira Minamikawa photo

南川 明 氏

シニア アナリスト

OMDIA

17:30 – 17:50

ディナー チェックイン

18:00 – 21:00

ガラ・ディナー

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