Deepak Kulkarni
Senior Fellow Advanced Packaging
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Deepak Kulkarni is a Fellow, Advanced Packaging at AMD. Deepak has over 15 years of experience in packaging technology development. Over the years, he has held several leadership positions driving substrate technology development and yield improvement. Prior to joining AMD, Deepak was Senior Director of packaging yield at Intel Corporation. He holds 17 patents and nineteen publications on various aspects of packaging such as 2.5D/3D architectures, DFM/DFY and AI techniques applied to yield management. His contributions to the semiconductor industry have been recognized by an Intel Achievement Award, Next 5% award (AMD) and best paper award (ITHERM). Deepak holds a PhD from the University of Illinois Urbana-Champaign with a major in mechanical engineering and a minor in computational science.
For 50 years, AMD has driven in high-performance computing, graphics, and visualization technologies – the building blocks for gaming, immersive platforms, and the datacenter. Hundreds of millions of consumers, leading Fortune 500 businesses and cutting-edge scientific research facilities around the world rely on AMD technology daily to improve how they live, work and play. AMD employees around the world are focused on building great products that push the boundaries of what is possible. For more information about how AMD is enabling today and inspiring tomorrow, visit AMD (NASDAQ:AMD) on their website, blog, Facebook and Twitter pages.
Kathy Yan, Ph.D.
Director of New Technology & System Integration, Advance Packaging and Test
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Kathy Yan, currently Director of New Technology & System Integration, Advance Packaging and Test at TSMC. She is now in charge of new CoWoS-R organic interposer technology RD development for high speed HPC application, advanced packaging mechanical and thermal simulation & validation. She has been also managing new product co-development projects for system customers, across multiple packaging architecture including InFO POP, InFO-SOW, CoWoS-S and CoWoS-R. In addition She is the key player in TSMC 3D Fabric Alliance as the Memory Eco-system program owner. Prior to joining TSMC, she spend most of her career at Intel Advanced packaging RD and Medtronic technology Center in Arizona, US. She has a PhD in Electrical Engineering and Master in Material Science from Auburn University.
TSMC pioneered the pure-play foundry business model when it was founded in 1987, and has been the world’s leading dedicated semiconductor foundry ever since. The Company supports a thriving ecosystem of global customers and partners with the industry’s leading process technologies and portfolio of design enablement solutions to unleash innovation for the global semiconductor industry. With global operations spanning Asia, Europe, and North America, TSMC serves as a committed corporate citizen around the world.
TSMC deployed 288 distinct process technologies, and manufactured 11,878 products for 522 customers in 2024 by providing the broadest range of advanced, specialty and advanced packaging technology services. The Company is headquartered in Hsinchu, Taiwan. For more information please visit https://www.tsmc.com.
Shinichi Yoshioka
Senior Vice President and Chief Technology Officer
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Mr. Yoshioka serves as the Senior Vice President and CTO at Renesas. He was appointed to these roles in August 2019, from his experience and technological expertise of the products and the market following the years he has dedicated to Renesas.
He began his career in Hitachi, Ltd in 1986. Since Renesas Electronics Corporation was established in 2010 based on Hitachi, Mitsubishi Electric, and NEC Electronics, he has held many key roles, such as the Vice President of Automotive Control and Analog & Power Systems Business Division, Safety Solution Business Division, and the Senior Vice President of the Automotive Solutions Business Unit.
He has a Bachelor of Engineering degree in Applied Physics from the University of Tokyo and graduated from Stanford University with a Master of Science in Electrical Engineering.
Renesas Electronics empowers a safer, smarter and more sustainable future where technology helps make our lives easier.
A leading global provider of microcontrollers, Renesas combines our expertise in embedded processing, analog, power and connectivity to deliver complete semiconductor solutions. These Winning Combinations accelerate time to market for automotive, industrial, infrastructure and IoT applications, enabling billions of connected, intelligent devices that enhance the way people work and live.
Hamid Azimi, Ph.D.
Senior Vice President, Advanced Packaging and Foundry
Formerly CVP of Intel
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Dr. Hamid R. Azimi is Senior Vice President of Advanced Packaging and Foundry at Marvell. In this role, he leads the development and deployment of next-generation packaging technologies and foundry strategies to support Marvell’s data infrastructure products.
Prior to joining Marvell, Hamid spent nearly 30 years at Intel, where he most recently served as Corporate Vice President and Director of Substrate Packaging Technology Development. He led global R&D and manufacturing teams and delivered industry-leading innovations including die-embedded panel level fanout, EMIB and glass packaging for AI and high-performance computing.
A recognized pioneer in semiconductor packaging, Hamid holds over 40 U.S. patents, including the patent on first-generation organic flip-chip ABF-based substrate. He has received multiple Intel Achievement Awards and is widely known for building high-performing, inclusive teams and mentoring future industry leaders.
Hamid earned a Ph.D. and M.S. in Materials Science from Lehigh University and a B.S. in Materials Engineering from Sharif University of Technology.
We believe that infrastructure powers progress. That execution is as essential as innovation. That better collaboration builds better technology. At Marvell, We go all in with you.
Focused and determined, we unite behind your goals as our own. We leverage our unrivaled portfolio of infrastructure technology to identify the best solution for your unique needs. And we sit shoulder-to-shoulder with your teams to build it. Agile in our thinking, and our partnerships, we look for unexpected connections that deliver a competitive edge and reveal new opportunities. At Marvell, we’re driven by the belief that how we do things matters just as much as what we do. Because, with a foundation built on partnership, anything is possible.
Kazunari Ishimaru, Ph.D.
Senior Managing Executive Officer & CTO, IEEE Fellow
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Dr. Kazunari Ishimaru, IEEE Fellow, is CTO and Senior Managing Executive Officer at Rapidus Corporation. He began his career at Toshiba in 1988, contributing to SRAM and logic development. As VP of R&D at Toshiba America Electronic Components, he led 32nm–20nm CMOS projects with IBM. Returning to Japan, he oversaw logic manufacturing at Toshiba Oita and emerging memory R&D at Kioxia Yokkaichi, later becoming Director of the Institute of Memory Technology R&D. He joined Rapidus in 2023 and became CTO in 2025, driving Japan’s advanced semiconductor initiatives, including 2nm logic and the RUMS model for integrated manufacturing innovation.
Rapidus will contribute to the fulfillment, prosperity, and well-being of people’s lives through semiconductors. We promote fab management with world-class R&D and manufacturing capabilities, collaborate with universities and research institutions to foster talents vital for semiconductor field, and further innovate toward a truly green society. Based on this corporate philosophy, we will establish new business schemes in cooperation with companies worldwide, develop and provide the world’s best cycle time reduction services, and promote creation of new industries together with our customers.
Dr. Yasumitsu Orii
Senior Managing Executive Officer, 3D Assembly Division
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Education: Osaka Univ. Osaka, Japan Bachelor 1986
Graduate School of Osaka Univ. Osaka, Japan PhD 2012
Dr. Yasumitsu Orii joined IBM Japan in 1986 and was a leading expert on Flip Chip organic packages, which had contributed to the performance improvements and miniaturization of such products as servers, laptop computers, and HDDs. The packaging technology is becoming more important for next generation server products as Moore’s Law reaches its limits. His flip chip expertise extended into many related areas. Initially, he was a pioneer of flip chip on FPC (Flexible Printed Circuit) for HDDs, which allowed the read/write amplifier ICs to be mounted on the suspension and much closer to the GMR head. Later, he developed the C2 (Chip Connection) technology that supported low-cost 50-μm-pitch flip chip bonding for the commodity consumer electronics market and it was licensed to a company in Taiwan. At IBM Research Tokyo, he was leading the next generation flip chip organic package, 3D-IC projects and Neuromorphic Computing for IBM Servers and creating new technologies under a Joint Development Program involving many leading Japanese materials companies. He left IBM in 2014 and joined NAGASE & CO., LTD. He established “New Value Creation Office” under the direct control of the president and launched the material informatics software as a service in 2020. He left NAGASE and he joined Rapidus Corporation in 2022/Dec. Now he is the senior managing executive officer to lead the 3D Assembly Division.
Rapidus will contribute to the fulfillment, prosperity, and well-being of people’s lives through semiconductors. We promote fab management with world-class R&D and manufacturing capabilities, collaborate with universities and research institutions to foster talents vital for semiconductor field, and further innovate toward a truly green society. Based on this corporate philosophy, we will establish new business schemes in cooperation with companies worldwide, develop and provide the world’s best cycle time reduction services, and promote creation of new industries together with our customers.
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