9-11 December 2025
Muscat, Oman
VP, Business Development (Panel Solutions)
Cleon Chan is the Vice President, Business Development for the Panel Solutions for Onto Innovation since 2019 after merger between Rudolph Technologies and Nanometrics. He worked with many companies on FOPLP, Interposer and Substrate (2.xD, 2.5D and 3D Heterogeneous Integration) to identify challenges and how Onto Steppers, Inspection/Metrology and Yield solutions can enable the Advanced IC Substrate and Packaging roadmap. Previously, he was with Rudolph Technologies as Global Sales and Applications in 2015. Prior to Rudolph, he was with Applied Materials as Strategic Marketing GM and was responsible for some key process equipment for both Advanced Packaging and Frontend processes. He also held management positions at Varian Semiconductor and STEAG Microtech before joining Applied Materials. Cleon graduated with Bachelor of Electrical and Electronics Engineering (Hons) from National University of Singapore.
Onto Innovation is a leader in process control, combining global scale with an expanded portfolio of leading-edge technologies that include: Un-patterned wafer quality; 3D metrology spanning chip features from nanometer scale transistors to large die interconnects; macro defect inspection of wafers and packages; elemental layer composition; overlay metrology; factory analytics; and lithography for advanced semiconductor packaging. Our breadth of offerings across the entire semiconductor value chain helps our customers solve their most difficult yield, device performance, quality, and reliability issues. Onto Innovation strives to optimize customers’ critical path of progress by making them smarter, faster and more efficient. Headquartered in Wilmington, Massachusetts, Onto Innovation supports customers with a worldwide sales and service organization.
General Telephone: +1 978 253 6200
General email: info@ontoinnovation.com
Website: www.ontoinnovation.com
Professor
He is the Leader and Professor of Integrated Green-niX+ Research Unit, Institute of Integrated Research (IIR), Institute of Science Tokyo. He has joined the Tokyo Tech since 2013 after NEC Corp., MIT and Sony Corp. He also serves as the Research Supervisor of JST-PRESTO on Information Carriers and Their Integrated Materials/Devices/Systems, the Deputy Leader of Device Technology Division, Leading-edge Semiconductor Technology Center (LSTC), and Associate Member of Science Council of Japan. He had served as the Director of Research Institute for the Earth Inclusive Sensing (2018-2022) and the Member of the Education and Research Council (2022-2023) in Tokyo Tech. He had also engaged in the Research Representative at JST-CREST, the Directors of JSAP (2019-2020), JIEP (2019-2020) and Japan MOT Society since 2019. He had served as the Chairs in Symposium on VLSI Technology 2013, IEEE/EDTM 2018, IEEE/IWJT (2017/2019/2021/2023) and IEEE/EDS/VLSI Technology & Circuits Committee (2020-2022).
Institute of Science Tokyo (former Tokyo Institute of Technology)
Director/Professor
Tetsuo Endoh graduated University of Tokyo in 1987 and received Ph. D degree from Tohoku University Graduate School of Engineering in 1995. He joined ULSI Research Center Toshiba Co. in 1987 and was engaged in both the R&D and the mass production of NAND Memory. He is a professor at the Department of Electrical Engineering, the Graduate School of Engineering, Tohoku University and director of the Center for Innovative Integrated Electronic Systems (CIES). His current interests are 3D structured device, novel memory, beyond-CMOS technology including spintronics, power-device and power electronics with GaN or SiC. He was a Fellow of the IEEE from 2023 for contributions to nonvolatile memory and spintronic logic.
The Center for Innovative Integrated Electronic Systems (CIES) has conducted the CIES consortium consisting of industry-academia joint researches, major national projects, and regional collaboration projects from fields such as materials, equipment, devices, circuits and systems through the cooperation of domestic and foreign companies with support of local government. CIES has expanded its R&D field from spintronics to AI hardware and power electronics, and has promoted to develop core technologies related to integrated electronics. To date, the center has developed various innovative technologies with highest performance in the world, has made progress in developing IoT and AI systems that require ultra-low power consumption. In addition, with the establishment of the startup “Power Spin Inc.” from Tohoku University, we are accelerating the development of the innovative technologies that we are developing into social implementation and the further advancement of industry-academia collaboration. In June 2021, Tohoku University established the Tohoku University Semiconductor Technology Co-creation to contribute to Japan’s semiconductor strategy and the world’s energy-saving society. In addition to this co-creation, CIES is positioned as a spintronics low power logic semiconductor development base in Japan’s semiconductor strategy, and is further strengthening efforts for promotion of industry-academia-government co-creation and social implementation. We will continue to create innovative core technologies and contribute to the industry and the enhancement of global competitiveness by the practical applications, and “new creation and innovation” through global and regional partnership.
Professor by Special Designation
Nahomi Aoto is working from 2023 at Hiroshima University as Professor by Special Designation and at Tohoku University as Specially Appointed Visiting Professor. She specializes in workforce advancement of university students and younger students by attracting them to semiconductor technology and industry. Her enthusiasm for this job is based on her forty-year-experiences of semiconductor R&D at device manufacturers, NEC, Elpida Memory and Micron, from engineer to executive. She has also been encouraging women to take leadership in this industry and our society.
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