27-28 August 2025
Suwon
12:25 – 12:35
Enabling the AI Era
With the slowdown of Moore’s law, Advanced packaging (AP) and heterogeneous integration (HI) has become key and integral to enabling the AI era. As value migrates from wafer fabrication towards packaging, we see a strong inflection point in AP/ HI units’ growth.
Advanced packaging and heterogeneous integration are innovative techniques used in semiconductor technology to enhance the performance, density, and functionality of integrated circuits.
Advanced packaging refers to the diverse set of techniques used to package and interconnect integrated circuits and other components within a single package. These techniques allow for higher performance, reduced form factor, and improved thermal management in electronic devices. Some examples of advanced packaging include 2.5D/3D packaging, fan-out wafer-level packaging, and system in package.
Heterogeneous integration involves combining different semiconductor technologies, such as logic, memory, and sensors, from various sources into a single package. This approach facilitates the creation of more complex and specialized integrated circuits, leading to improved power efficiency, performance, and reduced manufacturing costs.
Both advanced packaging and heterogeneous integration play crucial roles in enabling the development of more powerful and versatile AI electronic devices, and they shall continue to shape the future of semiconductor technology in the foreseeable future.
ASMPT is uniquely positioned to offer total end to end interconnect solution in the highly complicated field of Advanced Packaging and Heterogeneous Integration to our partners, covering the full spectrum of substrate interconnect, wafer laser singulation, 1st level interconnect and 2nd level interconnect.
Choon Khoon Lim
ASMPT Semiconductor Solutions
LIM Choon Khoon (CK) is a Senior Vice President and Chief Executive Officer of Semiconductor Solutions Advanced Packaging (AP).
CK’s career spans key engineering, manufacturing, and regional functional and global general management roles with several global semiconductor companies. As Chief Executive Officer of the Segment’s AP Business Group, he helps provide the industry’s leading first-level interconnect technologies covering leading AP First Level Interconnect (FLI) technologies for logic, HBM, Si Photonics & Co-Packaged Optics, wafer die singulation solution for advanced fabricated wafers and Panel ECD for fine Line/Space organic and glass substrate & Wafer PVD, that are well-positioned to serve and to scale with the most demanding AP needs.
CK holds a Bachelor of Science (Honours) in Production Engineering and Production Management degree from the University of Nottingham, United Kingdom
ASMPT Semiconductor Solutions
Company Profile
ASMPT Limited, founded in 1975, is headquartered in Singapore and is listed in Hong Kong Stock Exchange since 1989.
ASMPT is the only company in the world that offers high-quality equipment for all major steps in the electronics manufacturing process – from carrier for chip interconnection to chip assembly and packaging to SMT. No other supplier offers a comparable range and depth of process expertise.
Semiconductor Solutions Segment Business of ASMPT offers a diverse product range from bonding to molding and trim & form to the integration of these activities into complete in-line systems for the microelectronics, semiconductor, camera modules, advanced packaging, photonics, and optoelectronics industries.
The group has successfully established itself as the leading player in the back-end assembly and packaging market with its innovative solutions and constant focus on customer value creation.