We are at a pivotal moment in the semiconductor industry with a more diversified end market driven by the AI revolution. This shift is bringing innovation and new challenges.

In the recent months, significant investments have been made in data centers to build infrastructure and run new large language models that promise to drastically change every aspect of our lives.

While Moore’s law continues with the introduction of high NA EUV, the shift to the new gate-all-around (GAA) transistor architecture and the introduction of backside power distribution network, the pace of scaling in front end manufacturing has slowed and become more expensive.

Consequently, semiconductor packaging has started to play a more crucial role in driving performance, power, connectivity and cost advantages.

The acceleration of heterogeneous integration, being implemented with several new 2.5 and 3D architectures, is bringing unprecedented process, process integration and process control challenges in the wafer-level packaging and assembly fabs.

While AI compute platforms, such as GPU, HBM and other accelerators, continue to expand their presence in data centers, the semiconductor technology roadmap must adapt to enable AI edge applications where performance per watt across all compute domains (data center, client and mobile) will be the new performance metric moving forward.