This presentation will describe one aspect of the increasing complexity in MEMS foundry services including the resulting challenges and potential solutions.

The clear separation of raw wafer production, MEMS- and ASIC-manufacturing as well as packaging trend to vanish. Just some examples:

• The raw wafer type CSOI requires MEMS processing and application of the product design.
• Using the ASIC as cap for the MEMS requires stringent adaption of ASIC- and MEMS-design and -topography, as well as postprocessing of CMOS wafers in MEMS fabs.
• Also the combination of MEMS and ASIC portions on one piece of silicon drives the need for mixed-mode fabs
• Many MEMS types are made in ASIC facilities and in some cases, it is a pure question of definition, whether a product is named MEMS or ASIC, for example CMUTs or immobile optical MEMS architectures. This trend is accelerated by the need of typical CMOS tools, like ArF lithography for certain MEMS, like in some medical applications.
• 3D stacking of CMOS, MEMS and III/ / V semiconductors drive new production approaches
• Many more

Conclusions

Cost, size and performance requirements drive not only the transition from macromechanics to MEMS. It also supports an integration of MEMS and ASIC. Obviously, the alignment of ASIC and MEMS technology is crucial for the set up and the success. Additionally, some MEMS require processes, which are today available typically only in ASIC fabs, like lithography for narrow line widths, which are beyond i-line capability.

Cavity SOI is arising as a new category of raw wafer material. It provides additional options for future MEMS technologies. Since the mask layer “cavity” is designed depending on the product, a cooperation or merge of MEMS and raw wafer production is required.

The wafer fab to run such kind of mixed-mode device has to produce and control CMOS, MEMS and some assembly processes including cross contamination aspects.