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Challenges and Solution of FLI Technologies in various HI Packaging Architetures

“More Than Moore” with heterogeneous integrated Chiplets in different Advanced Packaging Architectures are continuously being developed in our Industry.

Along the development of these Advanced Packaging Architectures with the objectives of delivering the same or even better device performance as if it is in System On Chip (SOC), while at the same time of achieving the best cost of making, it brings challenges to advanced packaging engineer. ASMPT, being the total interconnect solution provider, has determined to collaborate with our customers and partners to overcome these challenges and offer the best-in-class interconnect equipment solutions to address their needs in a timely manner.

ASMPT is aiming to be a Total Interconnect Solution supplier establishing the widest product portfolio in Advanced Packaging Technology, from with thin film interconnect, to first level (die to wafer & substrate) as well as broad level interconnect (package to PCB). I am happy to share more with this presentation.

Nelson Fan photo

Nelson Fan

APT Business Lead,VP of Business Development APT ASMPT

ASMPT Limited