HPC (High Performance Computing) is a powerful tool that can be applied to solve intricate problems and overcome obstacles in diverse areas such as life science , environmental sciences, industrial and finance. To achieve high computing power, cutting-edge system-on-chips (SOCs) or next generation advanced packaging technologies are utilized to integrate processors, memory, and storage either on a die or package level. However, a critical hurdle in this process is effectively managing heat to preserve computing performance and power efficiency. In this context, we will discuss the challenges and present latest progress in thin film deposition of a solderable layer stack deposition on the wafer backside (BSM) to allow a perfect, reliable connection to the thermal interface material (TIM) foil. This back side metal (BSM) layer stack has not only to meet excellent adhesion and solderability, but also minimum film stress requirements and compatibility to tight process temperature restrictions of molded substrates.