Advanced silicon wafers can greatly improve power device performance and reduce power losses.

Bonded Silicon-On-Insulator (SOI) wafer is a cost-effective substrate choice for power management devices since its inherent isolation capability pushes towards monolithic integration reducing the die size. The device and buried oxide layer specification flexibility helps establish high freedom of design to streamline the chip development process.

Fully customizable gallium nitride (GaN) silicon substrate wafers with advanced stress management provide an enhanced platform for up to 1200 V lateral GaN power devices. All parameters including wafer thickness, crystal orientation and oxygen levels can be customized to enhance customer’s GaN epitaxy process efficiency and end product capability. Further benefits can be gained through GaN growth on SOI wafers. The layered structure of the SOI substrate enables monolithic integration increasing device performance and power efficiency, reduces dislocations and allows the use of thinner buffer layers.